Programming FLash

barry23 · ‎2006-04-02

Posted on April 02, 2006 at 14:44

Programming FLash

barry23 · ‎2005-04-17

Posted on April 18, 2005 at 06:21

Hi All

I am working on a project using a STR712 and I have a problem with flash programming.

I am having a problem trying to program Bank1 of the flash while running from Bank0.

If I run from RAM it works fine and if I step through the code using a JTAG debugger it works fine. If I run at full speed from ROM I get an undefined instruction exception.

Interestingly once I have stepped through it once I can then run through it at full speed.

On page 49 of the STR71X Reference manual (Rev 4)

It says

''Note The very first operation performed on a Flash bank will require an extra 1ms (typical) to be completed, compared to the data given in the Electrical Characteristics section of the Datasheet, since Flash structure has been optimized to offer the fastest ''Ready for Read'' time out of Reset. The very first operation must not me executed while fetching code from bank 0 since this bank will be busy during this extra time''

Does this mean bank 0 will be busy for the first flash operation even if that operation is on Bank 1 ?

Many thanks

Barry

[ This message was edited by: bazzer on 18-04-2005 09:52 ]

[ This message was edited by: bazzer on 18-04-2005 10:03 ]

hichem2 · ‎2005-04-17

Posted on April 18, 2005 at 07:36

Helllo bazzer,

The on-chip Flash is divided in 2 banks(0 & 1) that can be read and modified independently one from the other:

One bank can be read while another bank is being modified.

You can find on the web page

http://mcu.st.com/modules.php?name=mcu&file=familiesdocs&fam=86STR7

A ''Family Flash Programming Reference Manual'', you find a detailled description of how to use and program the flash memory.

Don't hesitate to ask me for any other clarification!

Cheers,

Hich ;)

barry23 · ‎2005-04-17

Posted on April 18, 2005 at 08:14

Hi

So erasing Bank1 will never be a problem when executing code from Bank0 even if the erase is the first operation performed on the flash module ?

Thanks

Barry

hichem2 · ‎2005-04-17

Posted on April 18, 2005 at 08:36

Hi bazzer,

Normally there is no problem to do this operation and as we said the 2 banks(0 & 1) can be configured and modified independently.

If you have a problem yet, you can send me your code and we will check the problem together.

Cheers,

Hich ;)

hichem2 · ‎2005-11-22

Posted on November 23, 2005 at 04:41

Hi Radix,

As you describe there is no problem in your configuration, can you tell me what is the runing CPU frequency.

Cheers,

Hich

hichem2 · ‎2005-11-22

Posted on November 23, 2005 at 06:40

Hi Radix,

Can you send us your code and we will check the problem together.

Cheers,

Hich

hichem2 · ‎2005-11-23

Posted on November 23, 2005 at 09:39

OK, Good!

You are Welcome. :p

mge · ‎2006-02-07

Posted on February 08, 2006 at 07:27

Hello,

I think i have the same problem erasing and writing to flash bank1

Can you give me some detailed information how you solve the problem

thanks

arkady · ‎2006-04-02

Posted on April 02, 2006 at 14:44

Quote:

On 23-11-2005 at 11:54, Anonymous wrote:

I've found the solution. It appears this note is important:

''... The very first operation must not me executed while fetching code from bank 0 since this bank will be busy during this extra time''

I now have the compiler set up in a way that it copies the first time write function into RAM before executing it (using the __ram directive). It waits in RAM until the FLASH write is finished.

Then it works. :)

Thanx for the help.

Hi, pls send me an example

:)

Snx, Arik

Arik