Posted on June 14, 2007 at 13:01I am planning to use the HOLD/HLDA bus sharing mode on the ST10F269 so that another CPU can write into XRAM on the ST10's bus.
I use ST10F269 Microcontroller Slave mode
The ST10F269 works with the program in the inside flash
Signals pins:
ST10F269(EA=1)
ST10F269(HLDA=1)
CPUmaster(CS) >>> ST10F269(Hold)
CPUmaster(RD) >>> ST10F269(RD)
CPUmaster(WR) >>> ST10F269(WR)
CPUmaster(16bit data) >>> ST10F269(16bit data)
CPUmaster(address) >>> ST10F269(address)
Problem:
if the slave(ST10F269) read xram when it enters hold mode and the master write in the xram, the data they are introduced an one wrong address
