MAC driver using interrupts

ken_barlow · ‎2007-03-15

Posted on March 16, 2007 at 05:38

ken_barlow · ‎2011-05-17

Posted on May 17, 2011 at 09:30

Hi,

I have successfully got the ST WEB server demo to work and am now attempting to convert the MAC driver to be interrupt driven. I am having a problem whereby an IRQ is received, but the address provided by the VIC is 0, so I just go back to reset. The init code is:

INIT CODE:

// From the demo

ENET_InitClocksGPIO();

ENET_Init(PHY_FULLDUPLEX_100M);

// Plus configure the vic.

VIC_Config( DMA_ITLine, VIC_IRQ, 1 );

VIC_ITCmd( DMA_ITLine, ENABLE );

// Tried this too.

//VIC_Config( ENET_ITLine, VIC_IRQ, 1 );

//VIC_ITCmd( ENET_ITLine, ENABLE );

// Clear any pending interrupt.

ENET_DMA->ISR = 0xffff;

// Enable the receive interrupt.

ENET_DMA->IER = 0x8000;

// From the demo.

ENET_Start();

INTERRUPT:

void ENET_IRQHandler(void)

{

// Just clear the receive interrupt.

ENET_DMA->ISR = 0x8000;

}

Any ideas what I am doing wrong?

Can the library code be used to generate interrupts?

What is the ENET_ITLine interrupt used for. I have tried both this and DMA_ITLine.

Also the problem seems to occur even with the Ethernet cable unplugged. And even if I dont enable the interrupt in the ENET_DMA->IER but still initialise the VIC.

It seems the WEB demo just sets up one DMA buffer.

Thanks!

ken_barlow · ‎2011-05-17

Posted on May 17, 2011 at 09:30

Watchdog setup.

SCU_APBPeriphClockConfig(__WDG, ENABLE);

WDG_DeInit();

WDG_StructInit(&wdInit);

wdInit.WDG_Prescaler = 0;

wdInit.WDG_Preload = 47999;

WDG_Init(&wdInit);

WDG_ITConfig(ENABLE);

VIC_Config( WDG_ITLine, VIC_IRQ, 10 );

VIC_ITCmd( WDG_ITLine, ENABLE );

WDG_Cmd(ENABLE);

I have since realised that the same happens with the UART when interrupt driven. Seems whatever error I have made in not in the MAC configuration, but is more general.

The MAC and/or UART will operate interrupt driven for a few minutes then the VIC returns zero as the ISR address and I get an effective reset. The SYSSTATUS contains 0x01.

Some ARM processor I have used in the past will generate 'spurious' interrupt which have to be handled with a default handler. Is this the case in the STR9? Is this what could be happening?

Thanks.

ken_barlow · ‎2011-05-17

Posted on May 17, 2011 at 09:30

Update.

I have managed to get the ENET interrupt working now, but only if I enable interrupts and setup the VIC after calling ENET_Start() AND I stop the WDG from generating a periodic interrupt.

If I wave the WDG and ENET interrupts enabled at the same time I still get the jump to 0 from the VIC supplying 0 as the vector address.

Thoughts?

anis · ‎2011-05-17

Posted on May 17, 2011 at 09:30

Hi,

Can you send the watchdog initialization software for generating the periodic interrupt?

ken_barlow · ‎2011-05-17

Posted on May 17, 2011 at 09:30

Turns out this is the problem. Its working now.

ken_barlow · ‎2011-05-17

Posted on May 17, 2011 at 09:30

I can successfully run an app with interrupt driven MAC, UART and periodic WDG if I handle the 'spurious' interrupts by simply clearing interrupt and not trying to process it. With moderate load I get two such interrupts per minute approximately.

Can you see anything wrong with my WDG setup?

sunyuanling1022 · ‎2011-05-17

Posted on May 17, 2011 at 09:30

Hello,KenBarlow.I have problem with the Ethernet of STR912,I can not Ping the EvalueBorad.coulde you send your Example to me ?I preciate your help!

Best Regards!My Email :

mailto:sun_yuanling@126.com