Posted on October 11, 2004 at 15:17I'd like to revisit this.
If I change the clock of the Atlas chip from 66MHz DX2 ( so 133MHz ) down to 25MHz DX1, I can save 1W and more. But this has to be strapped at power-on, and what I'd like is to run fast, then doze quietly when there's nothing to do.
As far as I can see the Doze, Standby etc. modes on the Atlas don't actually DO anything in hardware. They just give you SMIs at transitions between each state so you can implement your own meanings...
With the exception that
in Doze/Standby/Suspend the STPCLK modulation bits used are bits 2-4 of Clk_Cont0 ( 07Ch )
in Power-on and Housekeeping, bits 5 to 7 are used.
Does anyone agree/disagree?
Now as noted previously the Atlas programming manual has many pages about power management, including a description of the ClkCont0 register, which say ( imply ) that the CPU can reduce it's clock by a factor of 2/4/8/16/32/64 using STPCLK.
But then at the top of page 604 it has the lovely line '' The current revision of the STPC doesn't implement support for stopping CPU and other system clocks''
Does that mean ''please ignore the rest of this section until we issue some silicon which implements it'' or is their a more subtle difference between STPCLK and ''stopping CPU clock''
I'm very loath to waste my time on this if the manual is just fantasy....
