Posted on September 14, 2005 at 14:09Hello,
we're new to the ARM world, coming from a control system background. What strikes us as odd is the way interrupts are handled by the processor:
The same ISR is called for various events, e.g. for a UART interrupt, one has to poll a flag in the ISR to find out whether the transmit buffer is empty or wheter a byte has been received.
Now, suppose we found that the trasmit buffer is empty. We put some data in the UART output, clear the interrupt flag and exit from the ISR.
BUT: What happens if a byte was received by the UART during that time? Since we clear the interrupt flag at the end of the routine, we muss this interrupt, don't we? Thus we may lose a byte.
The same is true for any ''shared interrupt'', when two events causing an interrupt occur at *nearly* the same time. Of course, the probability of this happening may be arbitrarily small, but nonetheless it *is* there.
This is how I would program an ISR:
Enter ISR
|
|
V
--->Select INT source
| |
| |
| V
| handle event
| |
| |
| yes V
------ Other INT source active?
|
no |
V
clear interrupt flag
**** | ****
**** | ****
V
Exit
If another interrupt handled by this ISR occurs during the time where the asterisks are (however small the probability may be) we *will* miss it. Bummer.
How does one handle this? Or are we missing something and this is not really a problem? (It may not be a problem for the UART since there is a large enough FIFO there. But for other hardware interrupts, these can occur at any time and must not be missed!).
Any solutions?
greetings,
jens
[ This message was edited by: hl on 14-09-2005 17:41 ]
