2009-07-30 02:48 AM
2011-05-17 12:59 AM
Dear All,
I are facing a problem while writing secondary flash, the time taken to write a single halfword is more then 500ms. As per Eratta sheet(rev 5) for STR912FAw44 MCU, for writing to flash we need to set the bit 18 of configuration register of ARM core. I have tried by writing the code given in eratta sheet 1. Before flash writing command, in this case the MCU takes more then 500 ms to write a single half word to flash. i.e. no change from earlier case. 2. After the flash writing command, in this case the MCU hangs as soon as the first halfword command is executed. The code is pasted below. Please help us, we need to reduce the time required the flash. The scu clock for flash is also enable while initializing the MCU. u8 Flash_Write_Word(u32 FlashSector,u32 Offset,u16 *DataWord) { u8 FMI_Timeout_Status=0; u32 flashAddress; FMI_WriteProtectionCmd(FlashSector, DISABLE); FMI_EraseSector(FlashSector); FMI_WaitForLastOperation(FMI_BANK_1); flashAddress=FlashSector+Offset*2; __asm { MOV R0, #0x00000 MCR p15,0x1,R0,c15,c1,0 } // the following steps consume more then 500 ms....? FMI_WriteHalfWord(flashAddress,*DataWord); FMI_WaitForLastOperation(FMI_BANK_1); } Thanks in advance. Satnam Singh2011-05-17 12:59 AM
i got the solution, just do a dummy sram read before checking the status flag.
Thanks.2011-05-17 12:59 AM
The assembler code part should be added to the file ''STR91x.s''. All will be OK!
2011-05-17 12:59 AM
Hi, I'm trying to use the secondary flash as an ''emulated eeprom'' like in the application note but it does not work, I get errors like ''FMI_TIME_OUT_ERROR''. Someone has tips to access Bank1 and write some bytes to it?
2011-05-17 12:59 AM
Hi fred,
Just try by using my code pasted above, remove the __asm codes and add a simple dummy sram read before FMI_WaitForLastOperation(FMI_BANK_1); Also ensure the scu clock for flash is enabled. my code works in secondary flash.2011-05-17 12:59 AM
Forget about that, IT WORKS!!
Many thanks... Why the f*** would we have to do that dummy read? Is it documented somewhere?2011-05-17 12:59 AM
Yes, Fred. I also discovered by trial and error the need for a dummy Sram read. It is not documented. Also, the write 0xff to return to page read mode must be executed more than once to return to run operation.
Lloyd2011-05-17 12:59 AM
Hey, thanks for answering me.
Can you give an exemple of a dummy sram read? I don't get it... :-?