2009-03-12 01:31 AM
2006-09-13 05:54 AM
Quote:
On 13-09-2006 at 17:48, Anonymous wrote: New here, aren't you? Yes. Why?2006-09-13 06:02 AM
In fairness, they do usually get around to it and have been better recently. Your previous post would have been unfounded optimism within living memory!
2006-09-13 06:21 AM
Just sent an online product support request from this website. We'll see if it leads to anything.
2006-09-13 07:16 AM
Nah, they aren't bad these days. The answer you get should be definitive. Additionally, if it turns out to be serious, it will be in the next datasheet revision.
Should've thought before I shot my mouth off really.2007-01-25 02:32 AM
Hi,
I'm experingsing the same problem as described by volius I have observed 2 things: 1. If a new write is started within the ''end-of-write'' interrupt And is completed before the interrupt rutine is ended the ''end-of-write'' interrupt will not be retrigged. 2. Sometimes the ''end-of-write'' interrupt isn't triggered even thou the INTP and INTM bits are set. This occurs also when I only starts new writes from my main program. (This is rare but happens maybe 1 out of 10000 writes) Does anyone know a solution ?2007-03-27 10:31 PM
Hi all,
Could you please tell me which toolchain you are using? Best regards, Najoua. [ This message was edited by: Najoua on 28-03-2007 11:02 ]2007-03-28 07:46 PM
My toolchain is IAR EWARM 4.40. And I'm still confident that the bug is in the silicon. I could even direct you to the bit of the VHDL code (or whatever language is used to design MCUs these days) containing the bug if I had it.
- mike2007-03-29 10:44 PM
Unfortunately the end of write interrupt doesn't work you need to test the relevant bit as managed in standard library.
Nice and efficient way would be also using timer so you won't waste your time by wait loop and you would get dedicated time frame for testing bit according to the ammount of data to be written. I'm sorry about that information I beliave we'll solvve the issu in the next revision. Regards Radim2007-04-02 02:41 AM
Hi,
>>My toolchain is IAR EWARM 4.40. And I'm still confident that the bug is in the silicon. => At the first, we are still investigating on the issue and thanks for all your details. We reproduced the problem of end of write operation but ONLY when using running in Debug Mode: - If a Global run is applied, there is no problem: the End Of Write Interrupt is serviced normally. - If Breakpoints are inserted in the project and ‘Step Over’ or ‘Step Into’ are used, the problem could occurs. In stand-alone, there is no problem: the End Of Write Interrupt is serviced normally. We are also using the toolchain IAR 4.40 and other tests are set to find precisely the root cause. Thanks for your understanding. We will keep you informed with our last results.2009-03-11 09:04 PM
Hello,
I've just found this tree. I'm using the IAR 4.42A toolchain. Is the problem active yet? BTW: Raises the Erase-Op an Inter- rupt too? regards, Steffen