External Memory Interfacing

bhushan_shanthi · ‎2007-07-20

Posted on July 20, 2007 at 14:34

bhushan_shanthi · ‎2011-05-17

Posted on May 17, 2011 at 09:44

Hi,

I am trying to interface 512k of SRAM to STR912FW44 on the MCBSTR9 board. I have attached (pdf file) the circuit used for interfacing the memory chip in 8-bit multiplexed data mode. Chip select CS0 is used for selecting RAM.

I have interfaced the circuit to port pins available on the MCBSTR9 board.

I am using keil compiler with this board. I have made the following changes in ''Options for target window''. As it stands the code jumps into Undefined Handler after I start debugging.

If anybody has done external memory interfacing and made it work, please let me know the Keil configuration and changes to be made in the startup file.

Kind Regards,

Vasisht.

gxliu · ‎2011-05-17

Posted on May 17, 2011 at 09:44

set the ram1 with the start address and the size, such as set start 0x3c000000 for Non-buffered cs0, and the size 0x80000 for 512KB size.

gxliu · ‎2011-05-17

Posted on May 17, 2011 at 09:44

I set the parameters in keil, it is not must to set the parameter, and it work ok, maybe you should check your emi setting. the only problem I found is the speed. It is too slow, about 3MHz. Do you get faster?

bhushan_shanthi · ‎2011-05-17

Posted on May 17, 2011 at 09:44

Hi,

Could you please post your startup file and snapshot of keil windows.

Also, are you calling any GPIO functions from ST library to configure pins A16 (p7.0), A17 (p7.1) and A18 (p7.2) to be address lines and any EMI functions to configure the ALE length, MUX mode in SCU_SCR0 register?

In section 2.27 (page 30) of 75 page manual, it is described ''The configuration of 8 or 16-bit mode is specified by CPU firmware writing to configuration registers at run time''. I dont see any register having bit(s) that would accomplish this.

Anyone who has accomplished external memory interfacing, please post your response.

Regards,

Vasisht.

bhushan_shanthi · ‎2011-05-17

Posted on May 17, 2011 at 09:44

Just a quick update, I introduced these in my initialization, which I got from this forum:

----------------------------------------------------------

EMI_InitTypeDef EMI_InitStruct;

GPIO_InitTypeDef GPIO_InitStruct;

EMI_DeInit();

/* GPIO Setup */

SCU_APBPeriphClockConfig( __GPIO7, ENABLE );

SCU_APBPeriphClockConfig( __GPIO8, ENABLE );

SCU_APBPeriphClockConfig( __GPIO9, ENABLE );

GPIO_DeInit( GPIO7 );

GPIO_StructInit( &GPIO_InitStruct );

GPIO_InitStruct.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_7;

GPIO_InitStruct.GPIO_Direction = GPIO_PinOutput;

GPIO_InitStruct.GPIO_Type = GPIO_Type_PushPull;

GPIO_InitStruct.GPIO_Alternate = GPIO_OutputAlt2;

GPIO_Init( GPIO7, &GPIO_InitStruct );

SCU_AHBPeriphClockConfig( __EMI | __EMI_MEM_CLK, ENABLE );

SCU_EMIModeConfig( SCU_EMI_MUX );

SCU_EMIALEConfig( SCU_EMIALE_LEN1, SCU_EMIALE_POLHigh );

SCU_EMIBCLKDivisorConfig(SCU_EMIBCLK_Div2);

GPIO_EMIConfig( ENABLE );

/* Enable EMI clock */

EMI_InitStruct.EMI_Bank_IDCY = _EMI_Bank0_IDCY;

EMI_InitStruct.EMI_Bank_WSTRD = _EMI_Bank0_RD_WS;

EMI_InitStruct.EMI_Bank_WSTWR = _EMI_Bank0_WR_WS;

EMI_InitStruct.EMI_Bank_WSTROEN = _EMI_Bank0_OE_WS;

EMI_InitStruct.EMI_Bank_WSTWEN = _EMI_Bank0_WEN_WS;

EMI_InitStruct.EMI_Bank_MemWidth = EMI_Width_Byte;

EMI_InitStruct.EMI_Bank_WriteProtection = EMI_Bank_NonWriteProtect;

EMI_InitStruct.EMI_PageModeRead_TransferLength = EMI_4Data;

EMI_InitStruct.EMI_PageModeRead_Selection = EMI_NormalMode;

EMI_Init (EMI_Bank0,&EMI_InitStruct);

-------------------------------------------------------------------

With this, even before I enter C code, I get a ''prefetch abort handler''.

I single stepped through the program, it works fine until it reaches BX R0 in the startup file. I believe this is where it zeroes and initializes the RAM.

IMPORT __main

LDR R0, =__main

BX R0

If my assumtions are right, then without enabling clock to the external RAM or configuring the GPIO pins to be address lines, would not the processor fail to initialize external RAM and is that the reason why it is entering prefetch abort handler?

It will be of great help if experts in this forum could give me some inputs.

Regards,

Vasisht.

gxliu · ‎2011-05-17

Posted on May 17, 2011 at 09:44

It seemed that something wrong in str91x.s

what type of controller you select? Do you modify the defaut str91x.s in keil?

bhushan_shanthi · ‎2011-05-17

Posted on May 17, 2011 at 09:44

Hi gxliu,

I am using STR912FW44 on a MCBSTR9 board and interfacing 512kB SRAM using CS0 chip select, 8-bit multiplexed mode (please see external_memory.pdf).

Do I have to set the following in startup file before _main gets called?

1. Setting up p7.0, p7.1, p7.2 as address lines and p7.7 as CS0 (output alt2 function)

2. Setup the length of ALE and its polarity

3. Enable clocks to GPIO 7, 8 and 9

I have attached the startup file, please let me know if there is something not configured properly.

When I run the example with the simulator, after it executes _main, I see an error 65: access violation at 0x3c0000A4 no ''write'' permission.

I would appreciate if you have an example for external memory operation that you can post here.

Regards,

Vasisht

[ This message was edited by: vasisht111 on 21-06-2007 17:37 ]

bhines · ‎2011-05-17

Posted on May 17, 2011 at 09:44

Hi gxliu,

I was in this forum and I see you have been able to use external memory. I have a 512k x 8 SRAM and 2 latches set up as 8 bit multiplexed. I am getting 2 writes each time I write a single byte 10 hex apart. The scope shows 2 write pulses and 2 ale's back to back. Can you help me?