Debugging STR71 in external SRAM

[starkeeper]

Posted on July 01, 2007 at 14:28

Debugging STR71 in external SRAM

[starkeeper]

Posted on June 30, 2007 at 18:35

Hi,

I have an application board running with a STR710FZ2. Now I got really fast to the point where debgugging in the internal RAM is not possible anymore. I thought of an Adapterboard with external SRAM connected to the EMI. But I can not use the Boot-pins because they are needed in the application, and I also can not use the memory bank0. Is it possible to drive the Bootpins via JTAG? btw. I should mention that I am using opensource tools.. Also I could imagine to copy my code from flash into ext. SRAM and then debug using software breakpoints. Is this possible? That would mean that I have to flash, execute and then connect via JTAG?

[kleshov]

Posted on July 01, 2007 at 14:06

Quote:

On 30-06-2007 at 22:05, Anonymous wrote: Now I got really fast to the point where debgugging in the internal RAM is not possible anymore. You got fast? Not sure what this means. Why debug in internal RAM at all? It is possible to set two breakpoints in ROM.

Quote:

On 30-06-2007 at 22:05, Anonymous wrote: But I can not use the Boot-pins because they are needed in the application, and I also can not use the memory bank0. You only need the BOOT pins if you want something other than on-chip flash to be mapped at address 0 after reset. It is possible to boot from on-chip flash and remap memory later, see description of register PCU_BOOTCR.

Quote:

On 30-06-2007 at 22:05, Anonymous wrote: Also I could imagine to copy my code from flash into ext. SRAM and then debug using software breakpoints. Is this possible? That would mean that I have to flash, execute and then connect via JTAG? Yes, it is possible. - mike

[starkeeper]

Posted on July 01, 2007 at 14:28

Thanks for your reply.

I think two breakpoints are really not enough to work with on bigger projects. Even the small 8-Bit microchip IC's have eight breakpoints available! As I found out, it is possible to remap the memory via JTAG and it is also possible to set the BOOT register. That means I don't have to flash my code. I can remap the memory, load my program and then execute. The only drawback is now the crappy memory interface layout. Who in hell forgot to route a dedicated Write Enable Pin? Now I have to use a external logic... There are 17 unconnected Pins, wouldn't it be to hard to use one of them?