Bank 1 ST FMI library issues

[jmullens]

Posted on March 12, 2008 at 19:16

Bank 1 ST FMI library issues

[jilisegiar]

Posted on May 17, 2011 at 09:50

What's the revision of your STR91x device.

And with which frequency you run your bootloader?

[jmullens]

Posted on May 17, 2011 at 09:50

I'm using the STR912FAW44, and my bootloader runs at 96MHz.

Currently I am running the FMI_Config() function prior to configuring and enabling the PLL. I am basically using the same tested code I've used for 512K bank operation with some minor tweaks to get it working in the 32K bank. On great mystry to me is why FMI_Config(FMI_READ_WAIT_STATE_2, FMI_WRITE_WAIT_STATE_0, FMI_PWD_ENABLE,FMI_LVD_ENABLE, FMI_FREQ_HIGH) would cause a fatal exception when I remapped the ports by uncommenting the Remap_Bank_1 pound define in 91x_fmi.h If I uncomment this, then my debugger allows me to step further through my code. It almost seems like I am trying to write to an invalid address, or to an address that is somehow protected. /* This works -- result of commenting out Remap_Bank_1 */ *(vu16 *)((*(vu32*)0x54000010) << 2) = 0x60; /* but this doesn't -- result of uncommented Remap_Bank_1 */ *(vu16 *)((*(vu32*)0x540000C0) << 2) = 0x60; These constants are from the port definitions in the documentation.. Am I missing something obvious?

[jmullens]

Posted on May 17, 2011 at 09:50

FMI Flash configuration questions.

I am trying to use the firmware library from ST to develop my boot-loader bios program in bank1. If I uncomment the Remap_Bank_1 flag in 91x_fmi.h, I get fatal exception when executing: FMI_Config(FMI_READ_WAIT_STATE_2, FMI_WRITE_WAIT_STATE_0, FMI_PWD_ENABLE, FMI_LVD_ENABLE, FMI_FREQ_HIGH); /* FMI Waite States */ Utilizing the HiTop debugger, I was able to find that I get my fatal exception when the processor executes the line: *(vu16 *)FMI_BANK_1 = 0x60; when Remap_Bank_1 is defined, FMI_BANK_1 is defined as ((*(vu32*)0x5400000C) << 2) , and FMI_BANK_0 is defined as ((*(vu32*)0x54000010) << 2) The results of the debugger: address opcode instruction 0x0000038C 0C10A0E3 mov r1, #ch 0x00000390 541481E3 orr r1, r1, #5400000h 0x00000394 001091E5 ldr r1,[r1] 0x00000398 0111B0E1 movs r1, r1, lsl #2 0x0000039C 6040A0E3 mov R4,#60H 0x000003A0 B040C1E1 strh r4, [r1,#00h] ; produces a fatal exception after execution. If I leave Remap_Bank_1 undefined, FMI_BANK_0 is ((*(vu32*)0x5400000C) << 2), and FMI_BANK_1 is ((*(vu32*)0x54000010) << 2) Then FMI_Config() does not produce a fatal exception, but then the processor produces a fatal exception when calling the function FMI_WriteProtectionCmd(FMI_B0S0, DISABLE); Where FMI_B0S0 is defined as (0x00000000 + FMI_BANK_0) The results of the debugger: address opcode instruction 0x00000448 00009DE5 ldr r0, [sp] 0x0000044C 6010A0E3 mov r1, #60h 0x00000450 B010C0E1 strh r1, [r0,#00h] ; produces a fatal exception after executing. --- What could be the issue? In FMI_Config(), if BANK_1 is mapped to ((*(vu32*)0x54000010) << 2), it works correctly; but if it's mapped to ((*(vu32*)0x5400000C) << 2), it produces a fatal exception. If I execute FMI_WriteProtectionCmd(FMI_B1S0, DISABLE), when Remap_Bank_1 is undefined, it does not produce a fatal exception. If Remap_Bank_1 is defined, then FMI_WriteProtectionCmd(FMI_B0S0, DISABLE) produces a fatal exception. Is there something different that I'm missing about configuring the bank1 flash, like wait state differences? People here have successfully gotten their boot-loader to run in bank1, so some of you here have successfully been able the configure their flash-banks. Have any of you been able to get the ST micro library code working? I've had no problem whatsoever in erasing and programming bank1 from bank0, but am having a harder time erasing and programming bank0 from bank1. Any help or suggestions would be greatly appreciated. 91x_init.s initialization: LDR R6, =0x54000000 ; book bank size LDR R7, =0x0 ; 32K STR R7, [R6] LDR R6, =0x54000004 ; non boot bank size LDR R7, =0x6 ; 512K STR R7, [R6] LDR R6, =0x5400000C ; boot bank address = Bank 1 LDR R7, =0x0 ; 0x0 STR R7, [R6] LDR R6, =0x54000010 ; non boot bank address = Bank 0 LDR R7, =0x20000 ; 0x80000 << 2 STR R7, [R6] LDR R6, =0x54000018 ; enable Non Boot bank LDR R7, =0x18 STR R7, [R6] lnkarm_flash.xcl setting: // Code memory in flash in Bank1 (32Kbytes) -DROMSTART=0x00000000 -DROMEND=0x00007FFF I am using the IAR compiler v4.41A, and the HiTop52-ARM Debugger v05.20.0310 [ This message was edited by: jmullens on 04-03-2008 03:37 ]

[jilisegiar]

Posted on May 17, 2011 at 09:50

If your bootlaoder runs @96Mhz in this case you need to execute the FMI_Config() from RAM and not Flash. In fact the Flash wait state selection instructions must be executed from RAM as it is not possible to read while writing in the same bank..

[rajendrask]

Posted on May 17, 2011 at 09:50

Hi,

I am also using STR910 and facing issue at this function FMI_WriteProtectionCmd(FMI_B1S0, DISABLE); { else /* DISABLE */ { *(vu16*)FMI_Sector = 0x60; *(vu16*)FMI_Sector = 0xD0; *(vu16*)FMI_Sector = 0xFF; } } my control is entering in else loop and memory is getting erased and exception handler error is occuring. Please let me know if you have any sample application.

[jmullens]

Posted on May 17, 2011 at 09:50

changing the function:

void FMI_Config(u16 FMI_ReadWaitState, u32 FMI_WriteWaitState, u16 FMI_PWD,u16 FMI_LVDEN, u16 FMI_FreqRange) to __ramfunc void FMI_Config(u16 FMI_ReadWaitState, u32 FMI_WriteWaitState, u16 FMI_PWD, u16 FMI_LVDEN, u16 FMI_FreqRange) allowed this function to run successfully after I remapped the banks. I was then able to get my bios code working in bank-1. (Though I'm still having problems trying to figure out how to jump from my bios routine to my main application, and vise-versa) Incidentally, if you're not using the IAR compiler, you can do the following in-place of the IAR compiler intrinsic function _ramfunc Using the GNU compiler: 1) Make sure your startup code you are initializing is in the ''.data'' area. /***************************************************/ # Relocate .data section (Copy from ROM to RAM) LDR R1, =_etext LDR R2, =_data LDR R3, =_edata LoopRel: CMP R2, R3 LDRLO R0, [R1], #4 STRLO R0, [R2], #4 BLO LoopRel /***************************************************/ 2) Use the __attribute__((section(''.data''))) on the functions, to tell compiler which functions will be in .data area (RAM) /***************************************************/ void foo(void) __attribute__ ((section (''.data''))) { // Do whatever! } /***************************************************/ (3) To call the function, you need to define a function pointer variable to make an indirect call. /***************************************************/ // Define a function pointer int (*foo_pt)(void) = NULL; // Assign function pointer to foo foo_pt = &foo; // Call foo indirectly *foo_pt) (); /***************************************************/ ..Thanks to Shah S. from Hitex for the GNU-compiler trick.