2007-08-20 06:09 AM
2007-08-19 10:58 PM
We are using an ARM712FR2T6 in a design and due to lack of thought in the hardware design we now find we need to modify pins of an output port during both normal and IRQ processing. I have masked the port modification at normal level using:
dVal = EIC->ICR; // Save ICR content EIC->ICR &= ~0x0001; // Disable IRQ while changing Port Data GPIO0->PD |= GPIO_PIN5; // Disable TX GPIO0->PD &= ~GPIO_PIN6; // Enable RX EIC->ICR = dVal; // Restore ICR content but I find that the IRQ routine can still get in and upset the pin modification. If I put 8 'nop' instructions after the IRQ masking the problem seems to go away but I need to know if this is fixing it for good. Is there a possibility of IRQ's still being active for some clock cycles after changing the ICR register? if so how many 'nops' do I need in order to be absolutely safe? Thanks for any help PhilipJ2007-08-20 01:12 AM
There was a discussion on this forum recently, you might find it interesting:
2007-08-20 06:09 AM
Hi,
thanks for that, I failed to find the thread when I searched for anything related. It is exactly the problem I seem to be having and exactly the solution (8 nops = 2 instruction pipeline * 4xcpu clock). It seems a shame that a discussion of such an esoteric aspect of the STR7xx processors does not prompt more of a response from the ST engineers themselves, but leaves us users to work out what is going on. Oh well, it seems I have a solution and a reasonable explanation for why the solution should work thanks again PhilipJ