Utilisation of RX Individual Mask Registers in FlexCAN module (SPC56EL70L5)

[MMont.15]

Hi,

I would like to say if the FlexCAN inside the ST microcontroller SPC56EL70L5 supports the RX Individual Mask Registers (RXIMR). I read the CAN driver's implementation and it does not seem that these masks are implemented. Can I implement them?

Thanks for your help.

[Erwan YVIN]

Hello ,

in SPC5Studio and in RLA 1.8.0

we have not added RXIMR in our current driver

I think that you have to update this function

**
 * @brief   Configures and activates the CAN peripheral.
 *
 * @param[in] canp      pointer to the @p CANDriver object
 * @param[in] config	pointer to the @p CANconfig configuration
 *
 * @notapi
 */
void can_lld_start(CANDriver *canp, const CANConfig *config) {
 
 

 for(i = 0;i < MAX; i++)
  {
    canp->flexcan->RXIMR.R[i] = 0xFFFFFFFF; ??
  }

Best regards

Erwan

[MMont.15]

Hi Erwan,

I have already updated the "can_lld_start" function inside the "can_lld.c" file by setting the 32 RXIMR registers to a value. My problem is the following: I expect that if I set RXIMR8 = 0x00000000 (all don't care bits) than a message sent by MessageBuffer11 in loopback mode (I have 3 Rx Buffers and 3 Tx Buffers, excluded RXFIFO) will be always received by the MessageBuffer8 even if the MB8 programmed filter ID is different from the receiving ID. Is it right?

Thanks again for your help.

Best Regards

Marco

[Erwan YVIN]

Hello ,

According to the RM

My Answer is right ..

On Message Buffer Mode, RMXIMR8 should not care the filter ID.

Best regards

Erwan

[MMont.15]

Hi Erwan,

What do you mean with "Message Buffer mode"? I asserted the BCC bit in the MCR register in order to enable the RXIMR registers. Should I do other operations to use them correctly? Thanks.

Best Regards

Marco

[Erwan YVIN]

sorry ,

i was not cleared

i mean "Message Buffer Structure" (FIFO not enabled)

yes it is perfect

cf table 314

If MCR[BCC] = 1, then the RXIMRs are enabled an thus the

masks RXGMASK, RX14MASK and RX15MASK are not

used

Best regards

Erwan

[MMont.15]

Ok I have understood what you say, but in my configuration I have FEN bit = 1 so the RXFIFO should be enabled. Nevertheless, I want to receive on the first available RX Message Buffer, that should be the MB8 ( I have another problem with the RXFIFO because I am not able to see the content of the FIFO in Debug Mode, as I wrote in another thread). With FEN = 1, BCC = 1 and RXIMR8 = 0×00000000 I expect to receive the data sent with different ID. Is there something else to set? Thanks for your help.

Best Regards

Marco

[MMont.15 · Accepted solution]

Hi,

I solved my problem with RXIMR registers. Now they work correctly. I have another open thread about RXFIFO, maybe you could help me. Thanks again for your help.

Best Regards

Marco