Does the STGAP1AS Driver accept 3.3V Logic/lowVoltage Inputs?

[lauria.michele]

Yes, the primary side of STGAP1AS can work at either 3.3 V and 5 V supply voltage (VDD). Please refer to figure 3 in the datasheet for the proper connection to be used in each case.

The login input thresholds Vil and Vih are (1/3)*VDD and (2/3)*VDD respectively.

Tha nks and regards

Michele

[ritesh]

Hello,

I am facing SPI communication issue with STGAP1AS.

I am using EVALSTGAP1AS board with STM8S105C6 discovery kit.

I am not getting right value with SPI read register.

Below is SPI Init. As mentioned in datasheet CPHA = 1 and CPOL = 0

SPI_Init(SPI_FIRSTBIT_MSB, SPI_BAUDRATEPRESCALER_16, SPI_MODE_MASTER, SPI_CLOCKPOLARITY_LOW, SPI_CLOCKPHASE_2EDGE, SPI_DATADIRECTION_2LINES_FULLDUPLEX, SPI_NSS_SOFT,(uint8_t)0x07);

Read Register Routine.

u8 stGAP_ReadReg(u8 addr)
{
    u8 TxData[4], TxCount = 0;
 
    TxData[TxCount++] = addr;
    TxData[TxCount++] = CRC_BYTE;
    TxData[TxCount++] = NOP_BYTE;
    TxData[TxCount++] = CRC_BYTE;
 
    GPIO_WriteLow(SPI_CS_PORT, SPI_CS_PIN);
    MSDelay(1);
 
    for(u8 i = 0; i < TxCount; i++)
    {
        while (SPI_GetFlagStatus(SPI_FLAG_TXE)== RESET);
        SPI_SendData(TxData[i]);
        while (SPI_GetFlagStatus(SPI_FLAG_RXNE) == RESET);
        RxData[i] = SPI_ReceiveData();
    }
 
    GPIO_WriteHigh(SPI_CS_PORT, SPI_CS_PIN);
    MSDelay(1);
 
    return RxData[2];
}

#define CGF1                    0x0C
#define CGF2                    0x1D
#define CGF3                    0x1E
#define CGF4                    0x1F
#define CGF5                    0x19
 
Config[0] = stGAP_ReadReg(0xA0 | CGF1);
Config[1] = stGAP_ReadReg(0xA0 | CGF2);
Config[2] = stGAP_ReadReg(0xA0 | CGF3);
Config[3] = stGAP_ReadReg(0xA0 | CGF4);
Config[4] = stGAP_ReadReg(0xA0 | CGF5);

But This Reads

CFG1 = 0xAC
CFG2 = 0xBD
CFG3 = 0xBE
CFG4 = 0xBF
CFG5 = 0xB9

I have tried different ways but all time gives same result.

Whats wrong in my code?