How to setup IPWM on channels UC13, UC14 and UC15 with Low Level Driver component?

[CSeif.2]

Hi everyone,

I am using an AEK-MCU-C1MLIT1 development kit to in and output PWM, which work at least for EMIOS0 channel 0 output on pin PD15 of the SPC582B60E1 processor.

Nevertheless, it is not easy to comprehend, which group and channel number in the SPC5Studio Low Level Driver Wizard corresponds to the UC0-UC31 pins of the processor. According to RM0403 on page 752, the different channels support different modes.

Here as a picture for easy reference:

So far so good. That's why I planned using pins UC13,UC14 and UC15 as IPWM inputs and using UC16 as OPWFMB.

In the configuration wizard groups 1-3 only allow OPWMB or OPWMT mode. And on the group 0 channels, IPWM is not a selectable option.

So my questions:

• Is there a way to setup UC13,14 and 15 in IPWM mode with the LLD tool in SPC5Studio?
• If not, how is the correct order of steps to manually configure the eMIOS channels accordingly?
• Is it possible to set UC16 as output PWM mode while the other UCs are configured as IPWM?
• In the PWM configuration seetings, each group has channel number 0 to 6. How does that correspont to UC0-UC31?
• How do groups 0, 1-3 correspond to the picture above?

After reading the RM0403 and the datasheet of the processor itself, I still don't know how to set it up or if that is even possible.

Thanks in advance for an answer.

Best regards,

Christopher Seifert

[Erwan YVIN · Accepted solution]

Hello ,

• on LLD tool, it is not possible to setup UC13,14 and 15 in IPWM mode , only OPWMB and OPWMT are permitted.

Maybe , you can update the drivers to support IPWM

inplug low level driver and add implement IPWM configuration.

• By using , this register eMIOS UC Control register , there is no specific order to configure your channel
• I think yes , eMIOS UC Control register , you have to check your pinmap configuration.
• eMIOS0 Group1 CH8-CH15 Group2 CH16-CH23 Group3 CH24-CH31

Best regards

Erwan

[CSeif.2]

Hello Erwan,

thank you very much for the answer and the insight.

I tried to at least make the IPWM input work on eMIOS0 Ch 2 and created a little example project with channel 0 PWM output externally linked to the channel 2 input.

With the icu width callback reading icup->width I get the following output over UART:

012437<\n>

032365<\n>

052293<\n>

006685<\n>

026613<\n>

046541<\n>

000933<\n>

020861<\n>

040789<\n>

060717<\n>

015109<\n>

035037<\n>

054965<\n>

009357<\n>

029285<\n>

049213<\n>

003605<\n>

This does not look like PWM width measures, but more like overflowing counter.

My new questions:

• With eMIOS 0 global prescaler at 20, resulting in internal counter frequency of 1,000,000 (Hz?), the ICU prescaler at 2 gives 500,000 (Hz?), is there any way to reduce ICU count speed far more to avoid overflow of the 16 Bit internal counter registers?
• Is there any tool or table with recommended prescaler ratios between PWM and ICU?

In the attached icu_pwm_test_count project I calculated the difference of last width value with the new width value. This leads to pretty constant output of period length. Changing the input PWM ratio does not change the pwmWidth value.

• Could there be a wrong calculation in the LLD icu_lld_serve_interrupt function for the PWM width calculation
• Which other callbacks are necessary to calculate PWM width correctly?
• Is there any way to force SPC5Studio to update patch.xml for all the changes I made in the component driver files?

I hope somebody may have had the same problems while getting IPWM to work. Thanks for any new insight.

Let me know, if I should start a new thread for this topic.

Best regards,

Christopher Seifert

[zambrano.luigi]

Hi Christopher,

the relation between the eMIOS channels and the PWM low level driver channels is summarizing in the pictures that you can find in the document contained in the folder spc582bxx_low_level_drivers_component_rla/doc within your SPC5Studio test application.

 

As you can see from the picture, the eMIOS channels 8, 16 and 24 are not available (because there are used as counter for the other channels within the same group). In the current version of the driver for the channels of Group 1, 2 and 3 only the modes OPWMB and OPWMT are supported. Instead, for the channels of the Group0 only the modes OPWFMB (PWM) or SAIC (ICU) are supported.

Regards,

Luigi

[CSeif.2]

Hi Luigi,

thank you very much for your support.

I managed to replicate most of the code I need to activate channel 13 as IPWM input.

But I get no counts as if the counter input is not working.

• Do I need to configure channel 8 to supply counts to ch13?
• Am I right, that this is not necessary for the group 0 channels?
• Don't the group 1 channels have internal counter ability like group 0 channels?
• Is there any documentation on how to configure the channels 8,16 or 24 or even 23 to generate correct clock for the counter busses A,B,C,D,E?

Thanks in advance for any new insight in this topic.

Would be great, if the LLD would support not only PWM output setup, but also the other modes.

Best regards,

Christopher

P.S.: I am not able to open the .chm file in Windows 10. Still figuring out why...