2022-11-16 04:28 AM
Hello,
In our application we've found quite big differences in ODR between different samples of the ISM330DHCX and also for different modes:
For example if setting the ODR to 416 Hz we measure > 440 Hz. Furthermore when only ACC is active the ODR is 440 Hz, when GYR and ACC are active the ODR drops to 425 Hz. Is there any way to connect an external clock source or to somehow synchronize the ODR to an external clock? What are the specifications for ODR deviations for ISM330DHCX and LSM6DSOX for example? Is there any way to make ODR more stable?
Thank you!
Solved! Go to Solution.
2022-12-02 01:09 AM
Hi Martin,
just checked with our design team, the spread can span the +-10% range.
Unfortunately, we cannot share information on internal clock calibration, since this information is confidential.
-Eleon
2022-11-18 04:09 AM
Hi @MNoll.2 ,
The ODR can actually be different by the nominal one for few percentage, and if you need synchronization you should characterize the ODR for each sample (for example by activating the DRDY pin). The deviations are usually inside +-5% in the combo mode.
On this device, however, unfortunately there is no pin for external clock synchronization.
-Eleon
2022-11-18 06:05 AM
Hi @Eleon BORLINI ,
thank you for your reply. We are already measuring the ODR to account for that in FFT calculations etc.
However, is there any document showing how the internal clocks are working just to understand why there are differences between the ODRs of GYR and ACC and the combination of both. If an NDA is neccesary that is no problem. Thank you!
Martin
2022-11-18 06:42 AM
.Hi Martin @MNoll.2 ,
I escalate the case to OLS support for this request, please let me know if you get feedback in a few days.
-Eleon
2022-11-18 07:32 AM
Thank you, Eleon! @Eleon BORLINI
2022-12-02 01:09 AM
Hi Martin,
just checked with our design team, the spread can span the +-10% range.
Unfortunately, we cannot share information on internal clock calibration, since this information is confidential.
-Eleon