Spurious INT2 on LSM6DSMTR

[Jason Hendrix]

Posted on January 17, 2018 at 02:13

I believe I've configured my system (LSM6DSMTR connected to Nordic nRF52382 via I2C) to interrupt on INT2 when the FIFO threshold is reached.  What is happening, is that I get an interrupt when data first appears in the FIFO (status shows 3 samples), then after a while, I get the FTH interrupt with the status showing the FTH number of samples.  I suspect that the first interrupt is the wakeup interrupt I've configured in the MD2 register.  I've configured that so that the FIFO will transition to bypass-to-FIFO  Any suggestions how to eliminate that first interrupt at the processor? 

By the way, I do want INT1 to assert on wakeup.  Not INT2.  

Here's a readback of my registers:

0x1: 0x0

0x2: 0x00x3: 0x00x4: 0x00x5: 0x00x6: 0x4E0x7: 0x00x8: 0x10x9: 0x800xA: 0x240xB: 0x00xC: 0x00xD: 0x00xE: 0x80xF: 0x6A0x10: 0x200x11: 0x00x12: 0x640x13: 0x00x14: 0x00x15: 0x00x16: 0x00x17: 0x00x18: 0xE00x19: 0x00x1A: 0x00x1B: 0x00x1C: 0x00x1D: 0x200x1E: 0x50x1F: 0xC20x20: 0xED

0x21: 0x3

0x22: 0x00x23: 0x00x24: 0x00x25: 0x00x26: 0x00x27: 0x00x28: 0x430x29: 0xFD0x2A: 0xF80x2B: 0xFE0x2C: 0x580x2D: 0x410x2E: 0x00x2F: 0x00x30: 0x00x31: 0x00x32: 0x00x33: 0x00x34: 0x00x35: 0x00x36: 0x00x37: 0x00x38: 0x00x39: 0x00x3A: 0x00x3B: 0x100x3C: 0x20x3D: 0x00x3E: 0x410x3F: 0x410x40: 0x41

0x41: 0x0

0x42: 0x00x43: 0x00x44: 0x00x45: 0x00x46: 0x00x47: 0x00x48: 0x00x49: 0x00x4A: 0x00x4B: 0x00x4C: 0x00x4D: 0x00x4E: 0x00x4F: 0x00x50: 0x00x51: 0x00x52: 0x00x53: 0x00x54: 0x840x55: 0x00x56: 0x00x57: 0x00x58: 0x900x59: 0x00x5A: 0x00x5B: 0x10x5C: 0x20x5D: 0x00x5E: 0x200x5F: 0x200x60: 0x0

0x61: 0x0

0x62: 0x00x63: 0x00x64: 0x00x65: 0x470x66: 0x00x67: 0x00x68: 0x00x69: 0x00x6A: 0x00x6B: 0x00x6C: 0x00x6D: 0x00x6E: 0x00x6F: 0x00x70: 0x00x71: 0x00x72: 0x00x73: 0x00x74: 0x00x75: 0x0#lsm6dsm #wakeup #int2 #fifo

[Jason Hendrix]

Posted on January 17, 2018 at 20:06

To put it another way - Can I configure the LSM6DSMTR to trigger the FIFO (in bypass-to-FIFO) on Wakeup and get ONLY the FTH interrupt on INT2?

[Miroslav BATEK]

Posted on January 18, 2018 at 14:35

It seems to me that it is not possible, but I will double check with my colleagues.

Btw. you are using Continous-to-FIFO mode, not Bypass-to FIFO (it is not available).

[Jason Hendrix]

Posted on January 18, 2018 at 17:40

Thanks.  Please confirm after checking with your colleagues.  You're right that there is no Bypass-to-FIFO mode.  However, I think I'm in Bypass-to-Continuous - register 0xA = 0x24.  Not in Continuous-to-FIFO.

[Jason Hendrix]

Posted on January 19, 2018 at 02:54

I was able to make it work for me by sending the FTH interrupt to INT1 instead of INT2.  In this way I get separate interrupts for Wakeup and for FIFO threshold.

[Miroslav BATEK]

Posted on January 21, 2018 at 14:30

You are right, 0x0A = 0x24 means Bypass-to-Continuous mode.

The wake-up event detection has to be configured using INT2_WU bit of the MD2_CFG, so the wake-up signal will be always present on the INT2 pin.