2024-11-21 07:52 AM
Hi,
I am working on a custom ISPU code for LSM6DSO16IS and I want to generate interrupts on INT1 and INT2. I checked all the examples in x-cube-ispu/Ispu/ism330is_lsm6dso16is at main · STMicroelectronics/x-cube-ispu generates an interrupt only on INT1.
Is it possible to generate interrupts on INT1 and INT2 at the same time?
Thanks a lot :)
Chen
Solved! Go to Solution.
2024-11-22 12:03 AM
Hi @cchen ,
Yes, both INT1 and INT2 can be generated. The configuration should be set in the conf.txt: https://github.com/STMicroelectronics/ispu-examples/blob/master/ism330is_lsm6dso16is/template/ispu/conf.txt.
acc_odr 26
acc_fs 8
acc_mode high_performance
ispu_irq_rate 26
ispu_int1 enable
ispu_sleep_int2 enable
ispu_latch disable
algo 0 enable
algo_int1 0 enable
The configuration highlighted in bold should be removed or should be changed by putting “disable” as an argument: by default, on the template and on our examples, INT2 is used for the ISPU sleep signal. The configurations highlighted in italics in the template enable INT1 in general and then specifically for Algorithm 0. To use INT2, similar configurations should be put in, so:
ispu_int2 enable
algo_int2 0 enable
This is if you want to enable INT2 on algorithm 0 as well, otherwise just specify, instead of '0', the number of the algorithm for which you want to generate the interrupt on INT2.
2024-11-22 12:03 AM
Hi @cchen ,
Yes, both INT1 and INT2 can be generated. The configuration should be set in the conf.txt: https://github.com/STMicroelectronics/ispu-examples/blob/master/ism330is_lsm6dso16is/template/ispu/conf.txt.
acc_odr 26
acc_fs 8
acc_mode high_performance
ispu_irq_rate 26
ispu_int1 enable
ispu_sleep_int2 enable
ispu_latch disable
algo 0 enable
algo_int1 0 enable
The configuration highlighted in bold should be removed or should be changed by putting “disable” as an argument: by default, on the template and on our examples, INT2 is used for the ISPU sleep signal. The configurations highlighted in italics in the template enable INT1 in general and then specifically for Algorithm 0. To use INT2, similar configurations should be put in, so:
ispu_int2 enable
algo_int2 0 enable
This is if you want to enable INT2 on algorithm 0 as well, otherwise just specify, instead of '0', the number of the algorithm for which you want to generate the interrupt on INT2.
2024-11-22 04:17 AM
Hi Federica,
I have followed your advice and managed to generate interrupts INT1 in "algo 0" and INT2 in "algo 1".
But it happens that when INT2 is 0, it only freezes all my ISPU Output data. And when INT2 is 1, it reads the ISPU Output data. The same does not happen with INT1.
I have no ideas on where to debug this problem, could you give me some advices please?
I am programming my code in STM32CubeIDE and testing it with STEVAL-MIK109V3 with adapter board MKI229A (LSM6DSO16IS) and showing my output value in MEMS Studio.
The configuration I set in conf.txt:
acc_odr 104
acc_fs 2
acc_mode high_performance
gyr_odr 104
gyr_fs 500
gyr_mode high_performance
ispu_irq_rate 104
ispu_int1 enable
ispu_int2 enable
ispu_latch disable
algo 0 enable
algo 1 enable
algo_int1 0 enable
algo_int2 1 enable
In the main.c inside the signal function "algo_00" it finish with
if(int1_signal == 1){
int_status = int_status | 0x1u;
}
And in function "algo_01":
if(int2_signal == 1){
int_status = int_status | 0x2u;
}
I have not modified the function "int main(void)"
Thank you very much!