2023-07-20 03:06 PM
Greetings,
I have been trying to read the sensors from the ISM330DLC using its FIFO. However, when reading the number of samples (FIFO_STATUS1/2), it remains 0 with just dataset 1 and 2 enabled. When enabling dataset 4 with either, or and temperature and timestamp, the FIFO fills as expected. Note that im able to poll the sensor values with expected results.
I have included all my register settings below, using the standard c-library: https://github.com/STMicroelectronics/STMems_Standard_C_drivers/tree/master/ism330dlc_STdC
2023-07-28 02:56 AM - edited 2023-07-28 02:57 AM
Hi @LackSumInfo ,
Try something like this:
/* Set full scale */
ism330dlc_xl_full_scale_set(&dev_ctx, ISM330DLC_2g);
ism330dlc_gy_full_scale_set(&dev_ctx, ISM330DLC_500dps);
/* Enable Block Data Update */
ism330dlc_block_data_update_set(&dev_ctx, PROPERTY_ENABLE);
pattern_len = 10;
ism330dlc_fifo_watermark_set(&dev_ctx, 10 * pattern_len);
/* Set FIFO mode to Stream mode */
ism330dlc_fifo_mode_set(&dev_ctx, ISM330DLC_STREAM_MODE);
/* Enable FIFO watermark interrupt generation on INT1 pin */
ism330dlc_pin_int1_route_get(&dev_ctx, &int_1_reg);
int_1_reg.int1_fth = PROPERTY_ENABLE;
ism330dlc_pin_int1_route_set(&dev_ctx, int_1_reg);
/* Set FIFO sensor decimator */
ism330dlc_fifo_xl_batch_set(&dev_ctx, ISM330DLC_FIFO_XL_NO_DEC);
ism330dlc_fifo_gy_batch_set(&dev_ctx, ISM330DLC_FIFO_GY_NO_DEC);
/* Set ODR FIFO */
ism330dlc_fifo_data_rate_set(&dev_ctx, ISM330DLC_FIFO_6k66Hz);
/* Set XL and Gyro Output Data Rate:*/
ism330dlc_xl_data_rate_set(&dev_ctx, ISM330DLC_XL_ODR_6k66Hz);
ism330dlc_gy_data_rate_set(&dev_ctx, ISM330DLC_GY_ODR_6k66Hz);
If this solves your problem, please mark my answer as "Best Answer" by clicking on the "Accept as Solution" button, this can be helpful for Community users to find this solution faster.
2023-07-30 11:39 AM - edited 2023-07-30 02:19 PM
Thank you for your sugestion, unfortunatly the problem remains the same.
I use these methods to check the status of the number of samples and wtm-flag:
ism330dlc_fifo_wtm_flag_get(&dev_ctx, &FIFO_wtm_flag);
ism330dlc_fifo_data_level_get(&dev_ctx, &FIFO_nValues);
where the storage regusters are declared as:
static uint16_t FIFO_nValues = 0;
static uint8_t FIFO_wtm_flag = 0;
2023-08-01 02:44 AM
Hi @LackSumInfo ,
could you show us a dump of the FIFO_CTRL and FIFO_STATUS registers?
also, is it a problem for you the fact that you have to turn on also the fourth dataset?
Niccolò
2023-08-05 02:16 AM - edited 2023-08-05 04:55 AM
Enabled the 4th dataset, its not an issue. However i dont see anything in the documentation mentioning it as an requirement:
ism330dlc_fifo_dataset_4_batch_set(&dev_ctx, ISM330DLC_FIFO_DS4_NO_DEC);
The following is the dump of status and config:
FIFO_CTRL1= 11001100 (LE)
FIFO_CTRL2= 00000000 (LE)
FIFO_CTRL3= 00001001 (LE)
FIFO_CTRL4= 00001000 (LE)
FIFO_STATUS1= 00000000 (LE)
FIFO_STATUS2= 11101010 (LE)
FIFO_STATUS3= 00000000 (LE)
FIFO_STATUS4= 00000000 (LE)
When the 4th dataset is enabled, the FIFO fills up with data that is almost entirely 0. I read the FIFO the following way:
memset(data_raw_fifo, 0x00, 3 * sizeof(int16_t));
ism330dlc_fifo_raw_data_get(&dev_ctx, (uint8_t*) data_raw_fifo,
FIFO_nValues);