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IIS2DLPC: how much supply voltage change is allowed without affecting the device functionality?

FViga.1
Associate II

The datasheet for the IIS2DLCP gives an operating voltage range of 1.62 to 3.6V. But the supply voltage will usually not be just a clean DC voltage. It might have an AC component (ripple) or there might be short voltage dips caused by load transients on the supply. Will this affect the device function, for example the accuracy? How much ripple or voltage variation is allowed?

1 ACCEPTED SOLUTION

Accepted Solutions

Hi @FViga.1​ ,

I understand your point.

I think that here the issue could be more related to false negatives than to false positives. Let me explain a little better: if the Vdd drops below 1.62V, the device switches off and the interrupt won't be raised even in the case you should raise it (wake-up event); if instead the Vdd, that is let's say 1.8V increases up to 3V, the event will be anyway detected and notified to the application processor. The accuracy of the event detection should not be impacted, since the internal voltage reference of the analog block of the sensor is always regulated at the same level, and the digital levels are instantaneously linked to the Vdd level.

>> Will it be higher when supplied with 3.6V?

The IIS2DLPC will consume a little more at Vdd = 3.6V than at 1.8V, but the main component of this consumption depends on the ODR and the I2C/SPI communication time. In the same ODR condition, the current consumption increase as depicted in the picture below (LPM1 ODR 50Hz with Low noise Disabled):

0693W00000AN90QQAT.pngI cannot disclose the fully device characterization, but this is a general trend that well fits also other operating modes / ODR cases.

-Eleon

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6 REPLIES 6
Eleon BORLINI
ST Employee

Hi @FViga.1​ ,

the chips are internally protected from (relatively small) overvoltage shocks, but the first suggestion (that yo can find also in the datasheet, p.27) is to add decoupling capacitor(s) on the Vdd / VddIO lines, at least the 100nF one.

In general, it is recommended that also the AC spikes stays below the Absolute maximum ratings declared in the datasheet:

0693W00000AMChfQAH.png 

If so, the device accuracy will not be affected.

If my reply answered your question, please click on Select as Best at the bottom of this post. This will help other users with the same issue to find the answer faster.

-Eleon

Hi Eleon,

thanks for your support so far, but that was not what I meant. I am afraid I did not make my intention for this question exactly clear. I'll try to be a bit more specific:

I am working on a battery powered sensor device, that also has a bluetooth low energy radio on board. The purpose of the accelerometer is to generate a wake-up-interrupt when a significant movement is detected. The interrupt will then trigger a measurement.

The BLE radio will always be on, and in regular time intervals, when the transmitter is working at full power, the battery voltage will drop by approximately 200mV. A typical voltage waveform looks like this:

0693W00000AMF05QAH.pngThe yellow curve is the AC coupled battery voltage, the purple curve shows the 1.8V I/O voltage of the CPU (also AC coupled).

In theory it would be possible to supply the accelerometer directly from the battery, since the operating range goes up to 3.6V. But i am afraid the sensor might falsely detect a wakeup event during periods of high radio Tx power, when voltage is not stable enough.

The 1.8V I/O voltage is also not very clean, as you can see.

Thats why i would like to know if there are any recommended limits for such fast changing AC components in the supply voltage. I guess this is a very common problem when you have fast changing loads on a supply, so hopefully you can help me there.

A dedicated LDO for the sensor is of course an option, but this will increase the static current drawn from the battery. So the direct supply from the battery would be nice to have, if it is possible.

Hi @FViga.1​ ,

I've understood better now, thank you for your clarification.

If the Vdd doesn't drop below 1.62V, you should not experience device resets (i.e. loss of volatile memory content).

Maybe a simple 10uF capacitor on the battery Vdd line would help to smooth the ripples, behaving somehow like a passive AC filter.

But did you already tried your battery-powered application with the IIS2DLPC device?

-Eleon

Hi Eleon,

We already have a similar device, but without the IIS2DLPC sensor. That device is where the voltage measurements were taken. We now want to add the accelerometer for new functionality. I have not tried the new application yet, because the new device ist just being designed by our development partner. It was their proposal to supply the sensor from the battery, and i am feeling a bit uncomfortable about that. Thats why i asked.

As for the capacitor, we already have a 10uF cap in parallel with the battery. Without that the supply would look even worse.

I am not so much worried about the device going into a reset and losing memory contents. But I fear that the analog part of the sensor could be less accurate when voltage is not stable enough. The battery lifetime of our device depends strongly on the number of times that it wakes up to do a measurement. So I don't want it to wake up due to inaccurate acceleration measurement.

Another thing just came to my mind: maybe it will not save us any current at all when we supply the sensor without an LDO from the battery. In the data sheet the current consumption values for the IIS2DLPC are given for a supply voltage of 1.8V. Will it be higher when supplied with 3.6V? If yes, then the extra current consumption could be lower when we supply the sensor from a 1.8V LDO with a low Iq.

Hi @FViga.1​ ,

I understand your point.

I think that here the issue could be more related to false negatives than to false positives. Let me explain a little better: if the Vdd drops below 1.62V, the device switches off and the interrupt won't be raised even in the case you should raise it (wake-up event); if instead the Vdd, that is let's say 1.8V increases up to 3V, the event will be anyway detected and notified to the application processor. The accuracy of the event detection should not be impacted, since the internal voltage reference of the analog block of the sensor is always regulated at the same level, and the digital levels are instantaneously linked to the Vdd level.

>> Will it be higher when supplied with 3.6V?

The IIS2DLPC will consume a little more at Vdd = 3.6V than at 1.8V, but the main component of this consumption depends on the ODR and the I2C/SPI communication time. In the same ODR condition, the current consumption increase as depicted in the picture below (LPM1 ODR 50Hz with Low noise Disabled):

0693W00000AN90QQAT.pngI cannot disclose the fully device characterization, but this is a general trend that well fits also other operating modes / ODR cases.

-Eleon

Hi Eleon,

thank you, that information helps me a lot. The increase of current consuption between Vdd=1.8V and Vdd=3.6V is not that big, and due to constrained PCB size we can now save the space for an extra LDO.