IIS2DH FIFO stream mode configuration issues

[cr_0trakka0]

Hi

I am using an IIS2DH accelerometer and set up FIFO. The configuration sequences are following the IIS2DH example in Github, see below

// 25Hz, Low-Power Mode Disabled, XYZ enabled
ACC_Write_Command(IIS_CTRL_REG1, IIS_CTRL_REG1_INIT_25HZ);
// High-Pass Filter on INT2, FIFO disabled, interrupt registers in latched mode
ACC_Write_Command(IIS_CTRL_REG2, IIS_CTRL_REG2_INIT);
// +/-2g (4g full scale), HR Enabled
ACC_Write_Command(IIS_CTRL_REG4, IIS_CTRL_REG4_INIT_2G);
// Stream buffering on the acc
ACC_Write_Command(IIS_FIFO_CTRL_REG, IIS_FIFO_CTRL_REG_INIT_STREAM);

// Enable FIFO for this type of Tag
ACC_Write_Command(IIS_CTRL_REG5, IIS_CTRL_REG5_INIT_FIFO);

However, the accelerometer data is not updating until I am adding a 5 ms delay after writing the Stream Mode to the register.  See below,

// 25Hz, Low-Power Mode Disabled, XYZ enabled
ACC_Write_Command(IIS_CTRL_REG1, IIS_CTRL_REG1_INIT_25HZ);
// High-Pass Filter on INT2, FIFO disabled, interrupt registers in latched mode
ACC_Write_Command(IIS_CTRL_REG2, IIS_CTRL_REG2_INIT);
// +/-2g (4g full scale), HR Enabled
ACC_Write_Command(IIS_CTRL_REG4, IIS_CTRL_REG4_INIT_2G);
// Stream buffering on the acc
ACC_Write_Command(IIS_FIFO_CTRL_REG, IIS_FIFO_CTRL_REG_INIT_STREAM);
//introduce a 5ms delay to allow sufficient time for the sensor to update its registers with the latest data
delay_mSec(5);
// Enable FIFO for this type of Tag
ACC_Write_Command(IIS_CTRL_REG5, IIS_CTRL_REG5_INIT_FIFO);

I could not find any clue in the datasheet, we need a delay after certain FIFO mode registrations. 

Could anyone help me check my configuration, and why do we need a delay in between writing registers. 

Thanks. 

[Federica Bossi]

Hi @cr_0trakka0 ,

Welcome to ST Community!

Have you already tried to enable Block Data Update (reg CTRL_REG4 (23h)), set the FIFO watermark and the FIFO mode to Stream mode?

[cr_0trakka0]

Hi @Federica Bossi 

Thanks for your reply.

I have the Block Data Update enabled, as it is set by default value ' 0 '. 

Yes, I set the FIFO mode to Stream mode by "FIFO_CTRL_REG", however, I am not using the FIFO watermark, as in the application it is reading the accelerometer data instantly in a real-time way. 

Currently, it is only working with adding some time delay (5-10ms) after setting the "FIFO_CTRL_REG", otherwise the accelerometer data is not updating, and is stuck at the beginning. 

Thanks

[niccolò]

Hi @cr_0trakka0 ,

what do you mean by "stuck"? is it static at 0?

could you check if the registers were written correctly immediately after writing them? (mainly IIS_FIFO_CTRL_REG and IIS_CTRL_REG5)

Niccolò

[cr_0trakka0]

Hi @niccolò 

Yes, all the accelerometer data is static at 0, and not updating.

I double check the register values that are correct. See code below

// 25Hz, Low-Power Mode Disabled, XYZ enabled
ACC_Write_Command(IIS_CTRL_REG1, IIS_CTRL_REG1_INIT_25HZ);
// High-Pass Filter on INT2, FIFO disabled, interrupt registers in latched mode
ACC_Write_Command(IIS_CTRL_REG2, IIS_CTRL_REG2_INIT);
// +/-2g (4g full scale), HR Enabled
ACC_Write_Command(IIS_CTRL_REG4, IIS_CTRL_REG4_INIT_2G);
// Stream buffering on the acc
ACC_Write_Command(IIS_FIFO_CTRL_REG, IIS_FIFO_CTRL_REG_INIT_STREAM);

// Enable FIFO for this type of Tag
ACC_Write_Command(IIS_CTRL_REG5, IIS_CTRL_REG5_INIT_FIFO);

The register written sequences are following the code example on Git https://github.com/STMicroelectronics/STMems_Standard_C_drivers/blob/master/iis2dh_STdC/examples/iis2dh_fifo_read.c

The accelerometer will update data once I add a 5ms delay after writing the register "IIS_FIFO_CTRL_REG" for selecting Stream mode, is this the correct way to set up this accelerometer?

[niccolò]

Hi @cr_0trakka0 ,

sorry, I didn't explain myself well, I suggested to read the register right after writing it, just to confirm that the ACC_Write_Command was performed correctly.

could you also perform the full operations of the example (set also BDU and watermark), just to confirm that everything is all right?

Niccolò