How config IIS3DWB to FIFO mode with Watermark?

uilter · ‎2021-08-26

Hi, I'm trying to use the IIS3DWB as FIFO mode with a watermark.

I'm using a custom board. I double checked the hardware and guaranteed this board works well. I'm able to read/write the sensor using SPI interface and generate interrupt with wake-up int source.

To handle the sensor, I'm using the library created by ST. https://github.com/STMicroelectronics/iis3dwb

In this mode the interrupt INT1 not works well. This is my init code:

// Reset the sensor
iis3dwb_reset_set(&hAcc, PROPERTY_ENABLE);
 
do
{
    iis3dwb_reset_get(&hAcc, &reset);
    HAL_Delay(BOOT_TIME);
} while (reset);
 
iis3dwb_xl_data_rate_set(&hAcc, IIS3DWB_XL_ODR_26k7Hz);
iis3dwb_xl_full_scale_set(&hAcc, IIS3DWB_2g);
iis3dwb_fifo_mode_set(&hAcc, IIS3DWB_STREAM_MODE);
iis3dwb_fifo_watermark_set(&hAcc, 256);
iis3dwb_fifo_xl_batch_set(&hAcc, IIS3DWB_XL_BATCHED_AT_26k7Hz);
iis3dwb_block_data_update_set(&hAcc, 1);
 
int1_route.fifo_th = 1;
int1_route.fifo_ovr = 1;
int1_route.fifo_full = 1;
int1_route.fifo_bdr = 1;
iis3dwb_pin_int1_route_set(&hAcc, &int1_route);

Please, could you guide me to find where is my mistake?

If possible, can anyone add a sample code for fifo mode with watermark? It will be nice!

Many thanks!

uilter · ‎2021-08-30

Hi @DSull.3

Many thanks for your reply.

Removing this line "iis3dwb_fifo_xl_batch_set(&hAcc, IIS3DWB_XL_BATCHED_AT_26k7Hz) " the FIFO stops to work.

I set the bit STOP_ON_WTM on register FIFO_CTRL2 to 1 the INT1 started to working. Even with all those INT1 enabled, works without no problems.

// Reset the sensor
response = iis3dwb_reset_set(&hAcc, PROPERTY_ENABLE);
 
do
{
	response = iis3dwb_reset_get(&hAcc, &reset);
	HAL_Delay(BOOT_TIME);
} while (reset);
 
iis3dwb_xl_data_rate_set(&hAcc, IIS3DWB_XL_ODR_26k7Hz);
iis3dwb_xl_full_scale_set(&hAcc, IIS3DWB_2g);
iis3dwb_fifo_mode_set(&hAcc, IIS3DWB_STREAM_MODE);
iis3dwb_fifo_watermark_set(&hAcc, 256);
iis3dwb_fifo_stop_on_wtm_set(&hAcc, 1);
iis3dwb_fifo_xl_batch_set(&hAcc, IIS3DWB_XL_BATCHED_AT_26k7Hz);
iis3dwb_block_data_update_set(&hAcc, 1);
 
int1_route.fifo_th = 1;
int1_route.fifo_ovr = 1;
int1_route.fifo_full = 1;
int1_route.fifo_bdr = 1;
iis3dwb_pin_int1_route_set(&hAcc, &int1_route);

I checked with a logic analyzer and the INT1 is happening.

I'll test the results and apply a FFT to analyze the response frequency, but I think this resolve the issue.

I let you know this week.

Thanks!

View solution in original post

DSull.3 · ‎2021-08-27

Hi, not an expert of the topic, but what if you don't set the batch in FIFO? The iis3dwb_fifo_xl_batch_set(&hAcc, IIS3DWB_XL_BATCHED_AT_26k7Hz) line.

And if you set the STOP_ON_WTM bit of the FIFO_CTRL2 register to 1?

I see you also have enabled a lot of interrupts on INT1, can you try them one by one?

\Dk

uilter · ‎2021-08-30