STPM33/34 MISO & Insulating barrier

[Martin68]

Hello everyone

I am looking into the STPM33/34. I only want to use 1 SPI bus for both ICs and select it with the SCS.

In the datasheet I cannot see whether the MISO goes into tristate when the IC in question is not active.

I also cannot see any information about the galvanic isolation/barrier.

Can anyone give me information about this.
Thank you in advance.

[Peter BENSCH]

Correction to my previous statements and confirmation: both TX (UART) and MISO (SPI) are switched to tristate when the relevant device is deactivated via SCS. Even if it is not explicitly mentioned in the data sheet, several STPM3x can be connected to the same SPI bus and selected via their own SCS.

I have marked the sentence in the previous statements accordingly.

Sorry for the confusion.

Regards
/Peter

[Martin68]

Hello,

Thanks for the update, this makes it a lot easier.
Thank you again for taking the time to do this.

Best regards,

Martin

[Didier HERROUIN]

Hello,

The MISO line is in Hi-Z mode when the STPM3x is not selected (SCS at high level).

Just note this limitation in case you use several STPM3x in parallel: 
https://www.st.com/resource/en/errata_sheet/es0591-stpm3x-device-limitations--stmicroelectronics.pdf