Memory barrier instructions

[Cboe]

Hi!

I have the following code:

uint32_t currentTicks;
do
{
    currentTicks = handle->controlData.ticks; // controlData.ticks is volatile
    // copy a lot of data from handle->controlData
    ...
} while(currentTicks != handle->controlData.ticks);

handle->controlData.ticks (and the other data fields) are regularly updated, triggered by an interrupt, which could happen during copying of this data. The idea is that if the while check is false, just copy all the data again, since during the previous copying of said data new data must have arrived and the copied data would therefore be inconsistent.

We are running on an STM32H7 and the data is in DTCMRAM

For this to work, is a Memory barrier instruction required or could there be any other pitfalls?

[TDK]

Declaring it (and the data) as volatile is enough here, no other issues.

[Danish1]

As your variable is uint32_t and the handle also 32-bits, the 32-bit stm32 processor will access each one as single memory cycles.

Where each access is a single memory cycle, unless your ISR updates handle and also overwrites what handle used to point to, I don’t think you need to have the while loop.

You will need the while loop if the item you are accessing needs multiple read cycles - if it is larger than 32 bits or if it is not aligned in a 32-bit boundary (e.g. if the struct that handle points to is packed)