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[solved]DSPI Rx FIFO question

270284440
Associate III
Posted on July 01, 2015 at 03:48

I am programming on pictus dspi module, I have queries describe below:

/********************************************/

    DSPI(module).PUSHR.R = nCONT|DSPIx_CTAR0|nCS+ucDIN;

    while(DSPI(module).SR.B.RFDF == 0); 

    //Point A  

    DSPI(module).SR.B.RFDF = 1;   

    //Point B

/********************************************/

question are:

1) Read POPR should be inserted at Point A or Point B

2) From reference manual , I understand that RFDF is a flag indicating Rx FIFO is not empty, if I dont add any read DSPI_POPR code here, Will Rx FIFO be flushed to no entry level?

Thanks!

#dspi-pictus
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1 ACCEPTED SOLUTION

Accepted Solutions
Erwan YVIN
ST Employee
Posted on July 02, 2015 at 16:03 Hello Chu , 1) i recommend you to use RX FIFO Counter The RXCTR is decremented every time the DSPI_POPR is read POPR should be inserted at Point A RFDF shows that the interrupt is served Example from SPC5Studio (spi_lld.c)

void
spi_serve_dspi_rfdf(SPIDriver *spip) {
osalSysLockFromISR();
/* Emptying the RX FIFO.*/
while
((spip->rx_cnt > 0) && (spip->dspi->SR.B.RXCTR > 0)) {
uint32_t frame = spip->dspi->POPR.R;
if
(spip->rx_ptr != NULL) {
if
(spip->dspi->CTAR[0].B.FMSZ < 8)
*spip->rx_ptr8++ = (uint8_t)frame;
else
*spip->rx_ptr16++ = (uint16_t)frame;
}
spip->rx_cnt--;
}
/* Interrupt served.*/
spip->dspi->SR.B.RFDF = 1;

''In the interrupt service routine, RFDF must be cleared only after the DSPIx_POPR register is read.'' 2) RFDF is setwhile the RX FIFO is not empty. if you set 1 it will be reset. Best regards Erwan

View solution in original post

2 REPLIES 2
Erwan YVIN
ST Employee
Posted on July 02, 2015 at 16:03 Hello Chu , 1) i recommend you to use RX FIFO Counter The RXCTR is decremented every time the DSPI_POPR is read POPR should be inserted at Point A RFDF shows that the interrupt is served Example from SPC5Studio (spi_lld.c)

void
spi_serve_dspi_rfdf(SPIDriver *spip) {
osalSysLockFromISR();
/* Emptying the RX FIFO.*/
while
((spip->rx_cnt > 0) && (spip->dspi->SR.B.RXCTR > 0)) {
uint32_t frame = spip->dspi->POPR.R;
if
(spip->rx_ptr != NULL) {
if
(spip->dspi->CTAR[0].B.FMSZ < 8)
*spip->rx_ptr8++ = (uint8_t)frame;
else
*spip->rx_ptr16++ = (uint16_t)frame;
}
spip->rx_cnt--;
}
/* Interrupt served.*/
spip->dspi->SR.B.RFDF = 1;

''In the interrupt service routine, RFDF must be cleared only after the DSPIx_POPR register is read.'' 2) RFDF is setwhile the RX FIFO is not empty. if you set 1 it will be reset. Best regards Erwan
270284440
Associate III
Posted on July 03, 2015 at 03:53

Hi, erwan.

I debug by UDE yesterday,

It is true that I cannot write 1 to clear RFDF flag if I dont read POPR data first.

It is better to check '' RX FIFO Counter'' as you suggest.

Thank you so much!