STM32CubeMX (MCUs)

LL_LPTIM_Disable calls LL_RCC_GetSystemClocksFreq, but CubeMX does not generate stm32u5xx_ll_rcc.cThis causes a linker error due to undefined reference.A minimal reproduction .ioc file is attached.

I would like to report mishandling of USBX stack function return values and error codes in ST generated code.Here is a simplified CubeMX (v6.18.1) generated code call path for N6 MCU:void main(){ /* Call and ignore result */ MX_USBX_Init();}UINT MX_USBX_Init(VOID){ UINT ret = UX_SUCCESS; if (MX_USBX_Device_Init() != UX_SUCCESS) { /* USER CODE BEGIN */ return UX_ERROR; /* USER CODE END */ } return ret;}UINT MX_USBX_Device_Init(VOID){ UINT ret = UX_SUCCESS; /* More code here */ if (MX_USBX_Device_Stack_Init() != UX_SUCCESS) { /* USER CODE BEGIN */ return UX_ERROR; /* USER CODE END */ } return ret;}UINT MX_USBX_Device_Stack_Init(void){ UINT ret = UX_SUCCESS; /* More code here */ if (ux_device_stack_initialize(device_framework_high_speed, device_framework_hs_length, device_framework_full_speed, device_framework_fs_length, string_f

STM32CubeMX v6.16.1 has a small bug. Under Project Manager - Code Generator - HAL settings is an option to pick under which context the free pins should be set as a analog. I am using STM32N6 which has 3 contexts (FSBL, App, ExtMemLoader).The problem is that CubeMX doesn't store (or recall) this setting. I want to set them under Appli, but on every program start it sets the context to FSBL. After doing same "fix" for tens of times it gets quite annoying.

Confirming that CubeMX loading problem has been fixed. But I need to point out that RAMCFG enabling still comes with issue: AXISRAM clocks enabling code is not generated. As I wrote in another post, clocks are partially enabled by RIF code: STM32N6 RIF and MMT autoconfiguration errors - STMicroelectronics Community But AXISRAM3 clock is not enabled, so firmware halts. And power needs to be enabled also. My workaround is to enable all the AXISRAM clocks and power in HAL_RAMCFG_MspInit: void HAL_RAMCFG_MspInit(RAMCFG_HandleTypeDef* hramcfg) { /* USER CODE BEGIN RAMCFG_MspInit 0 */ /* USER CODE END RAMCFG_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_RAMCFG_CLK_ENABLE(); /* USER CODE BEGIN RAMCFG_MspInit 1 */ /* AXI SRAM1-2 is already enabled by BootROM. * Enable AXI SRAM3-6 clocks manually because CubeMX doesn't do it. */ __HAL_RCC_AXISRAM3_MEM_CLK_ENABLE(); __HAL_RCC_AXISRAM4_MEM_CLK_ENABLE(); __HAL_RCC_AXISRAM5_MEM_CLK_ENABLE(); __HAL_RCC_AXISRAM6_MEM_CLK_ENABL

CubeMX 6.18 does not persist two critical STM32U5A5 USBX and FileX settings when their values are entered as multiplication expressions in the form N*1024. This results in incorrect macros being generated in the app_azure_rtos_config.h header. The correct minimum values are provided below.UX_APP_MEM_POOL_SIZE    40*1024FX_APP_MEM_POOL_SIZE     2*1024USBX_MEMORY_STACK_SIZE 24*1024In the case of the STM32U5G9, CubeMX does not persist the USBX System Stack Size setting. The minimum required value is 24 KB. 

I'm using  Stm32CubeMx 6.18.0 on whole clean new Windows system. When I try to open New Project from Board It is downloading some file initially and when search for HTTP server it fails with error I typed at Title. I follow other releated topics suggestions to change directory and proxy server but its still fails. What should I doCurrently New Project from a Board UI opened, but still when I select a board or click tabs there, it is giving following error: `Error during Data Refresh - Download has failed, some data may be not updated. Please retry later`  

Hello, I am experiencing a reproducible issue with STM32CubeMX when generating a project for the first time on our U: drive. Our environment is part of an Active Directory domain, and each user has a U: drive mapped to their personal network home folder. Error in STM32CubeMX.logDuring generation, CubeMX successfully creates several temporary files in:  U:\FreeRTOS_M2\testv10\MXTmpFiles\ For example:  17:02:54.994 oldGeneratedFile ...\rtos_kernelStart.tmp_save17:02:55.076 Generated code: ...\rtos_kernelStart.tmp However, during the next generation pass, CubeMX tries to access the .tmp_save file again:  17:02:56.195 oldGeneratedFile ...\rtos_kernelStart.tmp_save17:02:56.200 ERROR ProjectBuilderjava.io.FileNotFoundException:U:\FreeRTOS_M2\testv10\MXTmpFiles\rtos_kernelStart.tmp_save(The system cannot find the file specified) 2026-09-03 17:02:55,707 [INFO] CodeEngine:297 - oldGeneratedFile, U:\FreeRTOS_M2\testv10\MXTmpFiles\rtos_threads.tmp_save2026-09-03 17:02:55,774 [INFO] CodeEngine:321

Hello,I am experiencing a reproducible issue with STM32CubeMX when generating a project for the first time on our U: drive.Our environment is part of an Active Directory domain, and each user has a U: drive mapped to their personal network home folder.Error in STM32CubeMX.logDuring generation, CubeMX successfully creates several temporary files in:  U:\FreeRTOS_M2\testv10\MXTmpFiles\ For example:  17:02:54.994 oldGeneratedFile ...\rtos_kernelStart.tmp_save17:02:55.076 Generated code: ...\rtos_kernelStart.tmp However, during the next generation pass, CubeMX tries to access the .tmp_save file again:  17:02:56.195 oldGeneratedFile ...\rtos_kernelStart.tmp_save17:02:56.200 ERROR ProjectBuilderjava.io.FileNotFoundException:U:\FreeRTOS_M2\testv10\MXTmpFiles\rtos_kernelStart.tmp_save(The system cannot find the file specified) The relevant part of the stack trace is:  java.io.FileNotFoundException:U:\FreeRTOS_M2\testv10\MXTmpFiles\rtos_kernelStart.tmp_save(The system cannot find the file speci

i meet this erro，and i resolved it by go window---Fireware updater----Check connection. then i can connect the internet, and connection to my account. Finally, I suspect it might be a problem with the network. You can try changing to a different network first. For example, you can use your mobile phone to create a hotspot.  

Reporting two issues when using STM32CubeMX v6.16.1 to generate STM32N6 code. I created new secure only template project for STM32N6570-DK to demonstrate the issue (it's attached).Only changes to the new project are these:In MMT defined RAM2 area over AXI SRAM3-6. Also check the "Apply Application Regions Settings to Peripherals".Then activated RIF for FSBL:Now generate code.It generates FSBL\Core\Src\main.c function SystemIsolation_Config(void).There are two function calls that cause assert failure because they violate the HW capability: /* set up base region configuration for CPUAXI_RAM0*/ /* region2 is secure */ risaf_base_config.EndAddress = 0x1003ff; risaf_base_config.StartAddress = 0x00000400; HAL_RIF_RISAF_ConfigBaseRegion(RISAF2, RISAF_REGION_2, &risaf_base_config); /* set up Sub region configuration for CPUAXI_RAM0*/ risaf_sub_config.EndAddress = 0xfffff; risaf_sub_config.StartAddress = 0x00000400; HAL_RIF_RISAF_ConfigSubRegion(RISAF2, RISAF_REGION_2, RISAF_S

I encountered a potential bug in CubeMXs Configuration Checks for USBX.I am trying to configure USBX in standalone mode. When i try to increase the value of “USBX System Stack Size” to be higher than 1024 i get a warning that it needs to be lower than the USBX memory pool size, even when this is the case.Attached is a screenshot with example settings. To reproduce the error set USBX System Stack Size to 1025.The used MCU is a STM32U385CGTxBest regards, Cecil  

STM32CubeMXIs there any way to adjust the size of the text in the left-hand pane?  and maybe the top right as well?  The ad is certainly large enough!Thanks!

Hi ST,Is the issue with generated code resetting RTC clock described hereCubeMX RTC config issues | Community (Internal ticket number: 200239)going to be fixed?Thanks,Thomas

Hi ST,I’m trying to configure the clocks for the STM32C071GBUx MCU in CubeMX (latest version, 6.17).This MCU has two SPI interfaces, two UARTs, and two I²C peripherals. However, CubeMX only allows me to configure the clock for one UART, one I²C, and no SPI at all.Am I missing something?I’ve attached the complete clock configuration diagram below.

Hello, I am using STM32N657X0H3Q,I am trying to interface unused XSPIM_1 pin - PO1 and XSPIM_2 pin - PN12 as i/o pins,However, STM32CubeMX flags “PARTLY DISABLES CONFLICT” when I try to use them as i/o pins. Can I still continue to use them as GPIO, as I need to interface them with my flash, which works at 1.8v,but my VDD=3.3V, so I only have my freedom of pins left in XSPI_1 and XSPI_2(both of them powered by VDDIO2 AND VDDIO3 are connected to same source at 1.8v), so the pins left are PO1,PO5, AND PN12,  It does not raise an issue when I use PO5; it raises an issue for both PN12 and PO1, Can Someone please help me sort this? Can I still use them, or do I necessarily have to go with a level shifter Thank you.

While using LPBAM in U5 series, it can only access to the SRAM4, but the official course of LPBAM just gives a solution of changing the address of RAM to SRAM4 in ld file. But this makes us can only use 16k SRAM4, not enough for many applications. And the cubeMX code is not setting in SRAM4 as default, is there any setting that I missed to set those?I have a solution in code but not a very perfect one.Put these to .ld file before  “_sidata = LOADADDR(.data)”, this will put all variables of LPBAM in SRAM4: .lpbam_sram4 :{ . = ALIGN(4);__lpbam_sram4_start = .; ./LPBAM*.o(.data .data* .bss .bss* COMMON) . = ALIGN(4); __lpbam_sram4_end = .;} > SRAM4the ./LPBAM* is used to match the LPBAM application folder. And I found another problem, for the SRAM4 is not initiated in startup. so we need to put those before main(){}, to initiate the SRAM4 variables, or there will be errors:/* USER CODE BEGIN PV */extern uint8_t __lpbam_sram4_start;extern uint8_t __lpbam_sram4_end;/* USER CODE END P

There have been countless topics (e.g. ) on the website’s downloads not working. How is it possible that this still is an issue? Whether I use my account or try downloading as a guest: After clicking the “Download” button, I am back at the tools page with no download starting. It doesn’t make a difference whether I use Chrome or Firefox. Multiple times I had to switch to using my phone to download the software. It was only recently that I noticed that I can also use WSL to download it. I don’t even understand why the GUEST download requires entering an email address. Is there any work going on to simplify downloading the software? You should have the resources to simplify this long, tedious procedure to simply clicking the button and getting the software.

CubeMX allows the user to change the Preemtion Priority of the “System service call via SWI instruction” / SVCall_IRQn.When its not at the default value of 0, CubeMX generates this HAL_NVIC_SetPriority(SVCall_IRQn, X, X); inside HAL_MspInit(). When USE_FULL_ASSERT is enabled this function call triggers an assert. Namely assert_param(IS_NVIC_PRIO_INTERRUPT(IRQn)) where IRQn is SVCall_IRQn and IS_NVIC_PRIO_INTERRUPT(X) checks if IRQn is != to SVCall_IRQn.I noticed this on a STMU385, using CubeMX version 6.18.1Best Regards, Cecil

Im on STM32H573 and im using a USART with GPDMA for both RX and TX. The project was created with CubeMX 6.16.1. In Pinout & Configuration → Connectivity → USARTx i have the GPDMAx Channel x global interrupts enabled and USARTx global interrupt disabled. Its done this way, so that i can check for the character compare interrupt in my own implementation of USARTx_IRQHandler and then call HAL_UART_IRQHandler myself.When i load my project in CubeMX 6.18.1, it looks like everything is ok with the checkboxes, but when i generate it, the gpdma irq handlers get generated empty and my project does not work./** * @brief This function handles GPDMA1 Channel 0 global interrupt. */void GPDMA1_Channel0_IRQHandler(void){ /* USER CODE BEGIN GPDMA1_Channel0_IRQn 0 */ /* USER CODE END GPDMA1_Channel0_IRQn 0 */ /* USER CODE BEGIN GPDMA1_Channel0_IRQn 1 */ /* USER CODE END GPDMA1_Channel0_IRQn 1 */}If i start a fresh CubeMX 6.18.1 project, as soon as i configure the GPDMA for my USART TX request

Hi all,   I am working on a project where I have a clock generated from a 25MHz crystal oscillator and multiplied by a PLL to 100MHz. I want to feed this clock directly to the HSE input of my STM32G431CBU in order to achieve a 100MHz HCLK clock, which should be ok given that the maximum acceptable frequency is 170MHz. STM32CubeMX throws in an error saying that the clock input frequency is too high ("maximum should be 48MHz"). However according to table 55 in the datasheet (link below), the IO used for HSE input (PF0, IO structure FT_fa) should be able to function at 100MHz at speed 10 and even faster at speed 11, which are specified to be hardware limitations. https://www.st.com/resource/en/datasheet/stm32g431c6.pdf Can I force STM32CubeMX to just roll with it / trick it into accepting it? Is my STM32G431 just going to vaporize in a puff of smoke if I try it anyway?   Thanks!

hiIm using the STM32G474RETx for my project.I connected some timers for it but most of them warent generated on my main.c file (TIMER1, TIMER8 and TIMER16 were generated there), but TIM2,TIM5, TIM20 warent generated although i initiated them on the cube file.In addition, the compile button is disabled.Can someone help me with it please.Attached is my cube file.

Hi,I have a firmware running on an STM32H753 that was working correctly. After updating the STM32H7xx_HAL_Driver (by performing the migration in STM32CubeMX), the MCU gets stuck during the execution of SystemClock_Config().While debugging, I noticed that before the migration CubeMX generated:HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2)After the migration, the same function is generated as:HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0)If I manually change it back to:HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2)the MCU works correctly again. However, every time I regenerate the code from CubeMX, it goes back to FLASH_LATENCY_0.I have already tried changing the PLL and clock parameters in the Clock Configuration tab of CubeMX and then restoring the original values, to check whether CubeMX was not correctly updating the clock tree calculation, but the generated code still contains FLASH_LATENCY_0. Is this a bug introduced in the new HAL driver/C

I want to use the example project Ux_Device_CDC_ACM.ioc as the basis of a project to create a Virtual COM Port to bridge USB to UART. I made sure I downloaded the patch version stm32cubec0-v1-4-1. I opened the project in CubeMX. I corrected the USBX Platform Settings to USB, then went straight to generate code for IAR EWarm, as I usually do. Again, as usual, I began by trying to compile the generated project, which has always worked for me before. But I get Ux_Device_CDC_ACM - Ux_Device_CDC_ACM        build_ide.ninja:118: multiple rules generate C:/Users/garyd/Downloads/stm32cubec0-v1-4-1/STM32Cube_FW_C0_V1.4.0/Projects/NUCLEO-C071RB/Applications/USBX/Ux_Device_CDC_ACM/EWARM/Ux_Device_CDC_ACM/Obj/STM32C0xx_HAL_Driver_13552679092417003011.dir/stm32c0xx_hal.o        Any ideas? 

I have my application running properly on my custom board based on STM32C091RCT6 MCU. I developed my application with STM32CubeMX v6.18.0 and STM32C0 Firmware Package v1.4.0 and I use X-CUBE-FREERTOS.1.6.0 (FreeRTOS 11.2.0 and CMSIS-RTOS 2.1.3).Now I need to modify my IOC project. STM32CubeMX notified me for upgrade to the new release 6.18.1 and STM32C0 Firmware Package v1.4.1. So I install the updates and then I let STM32CubeMX migrate my IOC project. I generate the new upgraded application project and build without any errors.But my application crashes when it starts to run. With the debugger I see an unexpected interrupt is generated as osKernelInitialize() is called; my application falls into Default_Handler().Is X-CUBE-FREERTOS.1.6.0 maybe not compatible with STM32C0 Firmware Package v1.4.1?With the upgrade only some of the files in my “Drivers” folder were changed as well as my IOC and .cproject files.

“STM32CubeMX FMC pin solver hangs on STM32H7R7 when legal alternate FMC address mappings are present; removing redundant A16–A23 alternate functions avoids the hang.”… attached is project with stm32H7R7L8H3 with FMC32 configured with 4x SRAM and 2x SDRAM but for this was used patched mcu definition file “STM32H7R7L8HxH.xml” (included, has commented alternate address lines on upper pins which point to bottom address pins in fact, the “solver” is probably confused - I opted to forced exclusive one selected variant and then FMC configurrator stopped hanging on multiple selected SRAM/SDRAM … without patch it is impossible to configure … it probably MUST beheve similary on different parts also - provided is also list of potential other packages … I used chatgpt (high) to analyze this and she found issue also with help of log …I also tried to configurpart stm32H7R7L8H6H (only 16bit FMC) - this worked … and surprisingly worked also stm332F429NEHx with FMC32 - I was confused too, where is prob