STM32 MCUs Embedded software

I would like to use Zephyr as the RTOS for my project using an STM32WB55 and OpenThread.  Attempting to build the simple example 'shell' application fails for the nucleo_wb55rg board. west build -b nucleo_wb55rg c:\Projects_local\stm32_openThread\shell_openThread -p --build-dir c:\Projects_local\stm32_openThread\shell_openThread\build\nucleo_wb55rg -- -DBOARD_ROOT='c:\Projects_local\stm32_openThread\external\zephyr' -DCONFIG_NO_OPTIMIZATIONS=y The error returned is:-- west build: making build dir c:\Projects_local\stm32_openThread\shell_openThread\build\nucleo_wb55rg pristine -- west build: generating a build system Loading Zephyr default modules (Zephyr base). -- Application: C:/Projects_local/stm32_openThread/shell_openThread -- CMake version: 4.1.2 -- Found Python3: c:/Projects_local/stm32_openThread/.venv/Scripts/python.exe (found suitable version "3.12.4", minimum required is "3.10") found components: Interpreter -- Cache files will be written to: C:/Projects_local/stm32

I am using Nucleo-F446RE board and trying to verify the TIM1 update interrupt and PWM, the PWM is generated but if i put a break point in the update interrupt it does not halt, what is the reason?int main(void) { /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); MX_USART2_UART_Init(); MX_TIM1_Init(); /* USER CODE BEGIN 2 */ HAL_TIM_PWM_Start_IT(&htim1,TIM_CHANNEL_1); /* USER CODE END 2 */ /* Infinite loop */ /* USER CODE BEGIN WHILE */ while (1) { /* USER CODE END WHILE */ /* USER CODE BEGIN 3 */ } /* USER CODE END 3 */ } i have put a break point in the

according to the Readme where i need to place the .nx_data in order to prevent Build errors.nx_data (NOLOAD): { . = ABSOLUTE(0x341D4200); *(.NxServerPoolSection) . = ABSOLUTE(0x341F0200); *(.NetXPoolSection) } >RAM #### <b>NetX Duo usage hints</b> - Depending on the application scenario, the total TX and RX descriptors may need to be increased by updating respectively the "ETH_TX_DESC_CNT" and "ETH_RX_DESC_CNT" in the "stm32n6xx_hal_conf.h", to guarantee the application correct behaviour, but this will cost extra memory to allocate. - The NetXDuo application needs to allocate the <b> <i> NX_PACKET </i> </b> pool in a dedicated section. Below is an example of the section declaration for different IDEs. + For EWARM ".icf" file ``` define symbol __ICFEDIT_region_NXDATA_start__ = 0x341D4200; define symbol __ICFEDIT_region_NXDATA_end__ = 0x341F01FF; define region NXApp_region = mem:[from __ICFEDIT_region_NXDATA_start__ to __ICFED

I've developed a board using an STM32F767ZI to manage a set of power supplies via PMBUS. I've connected 4 I2C buses, each with 5 slave devices (power supplies), managing a total of 20 slave devices.My application continuously polls the slave devices to get their status. When I use a single I2C peripheral, I never get any read errors. However, when multiple I2C peripherals are running simultaneously, I get bursts of read errors on all 4 buses (though not all at the same time) approximately every 30 seconds to 1 minute.Each I2C polling routine runs in a separate FreeRTOS task.I've tried using the HAL drivers I2C in Polling, IRQ, and DMA modes. I've also tried using the I2C peripherals in PMBus mode (CubeMX Setup). The bus speed is 100KHz. I tested enabling one peripheral at a time and noticed that the frequency of errors increases as the number of enabled peripherals increases (no errors with only one I2C enabled, errors every 30s/1m with 4 I2C enabled).Can anyone suggest what I should i

I am trying to establish an ethernet comms with the STM32F207ZGT6 MCU.I have configured the pinout in CubeMX and followed various online resources for implementing LWIP, however I have had no success in discovering the device on my network, and thus am unable to ping. The Link led on the ethernet port lights up after my computer is connected, but no communication is acheived. I am using a DP83848MSQ/NOPB PHY. Could someone please shed some light on the CubeMX configurations for the LWIP. I have disabled DHCP and assigned a static IP. My computer is on the same subnet (192.168.1.xxx)as assigned in CubeMX for the MCU's LWIP settings. Further, both my computer's ethernet port driver and the MCU are assigned the same netmask (255.255.255.0). The MCU and PHY are configured to operate in RMII. I am currently not using FreeRTOS. I read elsewhere in a thread that there are some bugs associated with memory allocation for the heap, alongside issues with the HAL driver, ethernetif.c and lwip.c fi

Greetings! So I have a personal project, using a STM32U585 MCU, with a self-designed board, in which I have a bootloader and the main firmware. So basically I implemented a protocol for communicating with the board, I have a C program that sends a command and the board sends data (around 20Kb), using USB.The scenario is the following: I flash the firmware with the bootloader, after flashing, the bootloader jumps into the main program and starts running, I send a command (via host) to get data and the board sends me data and everything is running smoothly. The problem starts when I unplug the board and plug it again, when I send the command to get data, the board starts to send it and then it completely freezes. Another curiosity, this situation only happens when I plug the board in a USB hub... if I plug the board directly to the laptop, I won't have any problem. Any clue of what can be the problem? Power related? Is there any issue with the jump to the main pr

I just started looking at the STM32C071 family as an alternative to the STM32F042 and STM32F072 we currently use. To my disappointment the USB stack for the C071 is a total mess (dozens of files and complete spaghetti) and on top of that it seems to be written by Microsoft. So there is absolutely no way we are going to use that.Did I miss some other option for the USB device library? This USBX stuff definitely is no option at all.At first glance it looks like there are no significant differences between the USB hardware of the C0 and F0 if only used as device not host. So I am wondering if I can simply use the F0 libraries (which we have debugged and optimized…) on the C0. Or are there any hidden traps?

Split from FATFS for STM32u575 - this is a different issue.helloo, i did the same exact thing and everything compiled properly, but after running it, the code freezes when the f_mount() function is encountered. Did you find a solution to your problem ??  

Hello!I am facing some problems with implementing TLSv1.3. I have enabled NX_SECURE_TLS_ENABLE_TLS_1_3 and NX_SECURE_TLS_TLS_1_3_ENABLED from CubeMX.I added these into my code:extern const NX_SECURE_TLS_CRYPTO nx_crypto_tls_ciphers_ecc; extern const NX_CRYPTO_METHOD *nx_crypto_ecc_curves[]; extern const UINT nx_crypto_ecc_curves_size; extern const USHORT nx_crypto_ecc_supported_groups[]; extern const UINT nx_crypto_ecc_supported_groups_size; // ... UINT tls_setup_callback(NXD_MQTT_CLIENT *client_pt, NX_SECURE_TLS_SESSION *TLS_session_ptr, NX_SECURE_X509_CERT *certificate_ptr, NX_SECURE_X509_CERT *trusted_certificate_ptr) { // ... /* Initialize TLS module */ nx_secure_tls_initialize(); /* Create a TLS session */ ret = nx_secure_tls_session_create(TLS_session_ptr, &nx_crypto_tls_ciphers_ecc, crypto_metadata_client, sizeof(crypto_metadata_client)); if (ret != NX_SUCCESS) { return ret; } /* Force the use of TLS 1.3 */ ret = nx_secure_tls_session_protocol_v

Post edited by ST moderator. In next time please use </> to share your code. Thank you for your understanding. hi, I am using stm32U5's uasrt2 DMA RX ,  DMA interrupt coming, usart idle int coming, ROR value right, but rx_buffer was not refreshed by DMA, here is my part of code.   /* USER CODE BEGIN PV */ uint8_t loop_TX = 0xaa; uint8_t loop_RX = 0x0f; /* USER CODE END PV */ ............................. /* MPU Configuration--------------------------------------------------------*/ MPU_Config(); /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); /* GTZC initialisation */ MX_GTZC_Init(); /* USER CODE BEGIN SysInit */ delay_init(); HAL_Delay(100); /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); MX_GPDMA1_Init(); MX_SPI2_Init(); MX_USB_OTG_FS_PCD_Init();

I am struggling to wakeup STM32N6570-DK from standby mode with user button (WKUP3).I created an isolated CMake + VSCode test project and share it in zip file. Based on latest CubeMX 6.17.0 and STM32N6 HAL 1.3.0. There is application and FSBL but I only use FSBL and do not jump into Application. My intention is that after wake-up, MCU launches Boot ROM that launches FSBL.The core part of the code is:static void EnterStandbyMode(void) { PWREx_WakeupPinTypeDef sWKUPConfigs = {0}; /* Prevent any disturbing interrupts */ __disable_irq(); /* Enable the Wake-up pin functionality */ sWKUPConfigs.WakeUpPin = PWR_WAKEUP_PIN3; /* PC13 (User button) */ sWKUPConfigs.PinPolarity = PWR_PIN_POLARITY_HIGH; sWKUPConfigs.PinPull = PWR_PIN_PULL_DOWN; HAL_PWREx_EnableWakeUpPin(&sWKUPConfigs); HAL_PWR_ClearWakeupFlag(PWR_WAKEUP_FLAG_ALL); /* AN5946 and errata say that BSEC should be enabled to go stand-by. */ __HAL_RCC_BSEC_CLK_SLEEP_ENABLE(); __HAL_RCC_BSEC_CLK_ENABLE(); /* Set init

Hi all,I’m working on porting a firmware from a Microchip PIC18F66J50 to an STM32C071.The original device communicates successfully with Windows and Android devices over USB, through an app developed in Flutter (Android Studio) using the QuickUsb library.On the STM32 side, I’m now using the USBX stack. After quite a bit of work, I managed to get the USB communication fully working with Windows — enumeration and protocol exchange both succeed.However, while the device correctly enumerates on Android, the protocol communication fails.Since the Android app already works perfectly with the original Microchip-based device, I assume that no changes are needed on the app side. This suggests that the issue lies in how the STM32 presents itself to Android (possibly in the USB descriptors or class/interface setup).Has anyone experienced similar issues with USBX on Android, or are there known differences in how Android handles vendor-specific protocols compared to Windows? Thanks for your he

I want to be able to program the external flash via VCP. So far, I have taken the combined code from the CM4 and CM7 core, then using memory address 0x90000000, I write to the QSPI using the BSP function: if (receiving_ext_flash) { if (BSP_QSPI_Write(0, Buf, qspi_write_address, Len) != BSP_ERROR_NONE) { CDC_Transmit_FS((uint8_t*)"QSPI Write Error\r\n", strlen("QSPI Write Error\r\n")); receiving_ext_flash = 0; return; } qspi_write_address += Len; } Has anyone tried doing something like this? I have not been able to get this to work. Thanks!

I used stm32g030c8t6 ， I want to create the  External loader by stm32cubeIDE， but I don't understand how to create，Are there any operation instructions? flash：w25q64 ， interface is SPI-2

Hello Everyone,I recently purchased STM32H7S78-DK.I'm looking for the code that runs on the discovery kit.As I understood from my collogue there should be an application that defines all the peripherals via cubeMX.I've downloaded the repository for this DK but all I see is examples that covers some of the peripherals and not one application that defines all the peripherals. I would if someone can share with the link for this application that define all the peripherals. 

Hello everyone, I’m working on the STM32G474RE and trying to generate two independent PWM outputs using the HRTIM peripheral. To get started, I followed this tutorial: wiki.st.com/stm32mcu/wiki/Getting_started_with_HRTIM For my first PWM output, I used: Timer: HRTIM1 Channel: CHA1 Compare Unit: CMP1 This one works perfectly , the duty cycle changes correctly when I update the compare value.   The problem When I tried to add a second PWM output, I followed the exact same steps as for the first one, except I used: Channel: CHC1 Compare Unit: still CMP1 (as shown in the tutorial) However, this second output (HRTIM1_CHC1) is always stuck at 50% duty cycle, no matter what compare value I write. Even if I set the compare value very low or very high, the output waveform stays at 0.5 duty cycle.   What I checked The GPIO pin for CHC1 is correctly configured in alternate function mode. The timer is enabled and running. The compare register is being updated (I

Dear ST Support Team,I am currently working with the STM32N657X0H3 microcontroller.We are attempting to use the internal 4.2 MB continuous SRAM (starting at address 0x34000000) as the framebuffer for LTDC.The procedure followed is:• Writing pixel data into internal SRAM at 0x34000000• Configuring LTDC_Layer1->CFBAR with the same framebuffer address• Enabling LTDC and RGB outputHowever, when using the internal SRAM (0x34000000) as the framebuffer, the RGB output signals remain inactive.When we configure the framebuffer in DTCM memory (as mentioned in the reference manual), the RGB signals become active and function as expected.However, the DTCM memory size is very small and not sufficient to hold a full framebuffer for our display resolution. Therefore, using DTCM is not a practical solution for our application.We have verified the following:• AXI read/write test passes successfully• Framebuffer base address is correctly configured• LTDC timing configuration is correct• RGB pin confi

Hello ST team,I am using Nucleo H753zi board, and I wanted to use X-CUBE-MEMSMIC1 expansion for sound source localization.I have already designed simple PCB to use MEMs microphone and connect it to H7 board's ADC. I want to understand how I can program my board to use 4 mics- GCC-PHAT algorithm to get location of sound source. I have gone through UM2212 and UM1901. Due to lack of experience in this field, can you guide me through how I can use this X-CUBE-MEMSMIC1 expansion for sound source localization? I found this diagram helpful and would like to understand how should I code to feed data from cache to Acoustic SL for processing.  

When I calling NVIC_SystemReset() in the os task, the system will enter into hard fault handler error, so I have to call NVIC_SystemReset() again in the HardFault_Handler() to reset the system, so what is the proper way to call NVIC_SystemReset() in the os task?  

The STRD/LDRD instructions store and load a 64-bit value. Internally, they are broken up into 2x 32-bit accesses.Since the element size is a word and not a double-word, they are not atomic in the same way that a uint32_t is atomic. Questions are:Is this instruction interruptible between the first and second 32-bit accesses?If the instruction does get interrupted, does it restart or resume? If it restarts, it will re-write the first word, for a total of 3x 32-bit accesses. If it resumes, it will only write the last word.The ARM reference manual has this to say on the subject:https://developer.arm.com/documentation/ddi0403/latestTo me, it seems they are restarted based on this text, but the two "might" words here leave ambiguity. But let's not rely on manuals or what people say on the internet. What actually happens in the hardware?

We are using the NUCLEO-H753ZI family of boards with the specific MCU being STM32H753ZIT6. We were following this tutorial: https://community.st.com/t5/stm32-mcus/how-to-create-a-project-for-stm32h7-with-ethernet-and-lwip-stack/ta-p/49308/page/2/show-comments/true The difference between the hardware used in the tutorial and the hardware we use is that instead MII, which is what is used in the tutorial, we are using RMII Even though we were following the tutorial to the dot, our implementation is still not working. We have reverted back from the lasted implementation of STM32CubeIDE to STM32CubeIDE 1.9.0 as mentioned in the tutorial as well. CURRENT DIAGNOSIS:  We have confirmed with a digital oscilloscope that when we are pinging the STM32H753ZIT6, the CRS_DV Pin, which is pin 11, is not going high at all. We have observed, using the oscilloscope, that in our PHY (LAN8742A) on pin 8 that we are able to receive packets and that it is unable to transmit packets using TX pins. T

I am wishing to write two floating point values to flash memory at time.  I understand it is best to write 64 bits at a time, hence my writing two floats at once. This question is about using a union to structure the data. This code won't compile for the STM32L412KB.  Could someone please show me where I am going wrong? error on line 17.  Thanks.struct dual { float v1; float v2; }; struct dual two_readings = {1.23, 4.56}; union gemini { struct dual left; uint64_t right; }; union gemini value; value.right=0; 

Hi everyone,i am using the stm32g0b1cet6 controller. in which I am working with flash memory. I am using the FLASH_WaitForLastOperation function. In that function, one flash SR register's CFGBSY bit is not reset, and due to that all other flash write and erase processes it not working. this issue is coming randomly. before calling FLASH_WaitForLastOperation function I am clearing error flags as shown below __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR);__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPERR);__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_PROGERR);__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_WRPERR);__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_PGAERR); __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_SIZERR);__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_PGSERR);__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_MISERR);__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_FASTERR);__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_RDERR); can someone please provide some input ASAP.      

I am able to receive UDP unicast packets on the Nucleo-h563ZI using the netconn API, however I cannot receive broadcast UDP packets (global or subnet). I have attached my lwiopts.h for reference along with the relevant discovery service code below. Note that netif->flags has NETIF_FLAG_BROADCAST set in addition to NETIF_FLAG_ETHARP. I was unable to find any broadcast related settings in the IOC file for the ETH peripheral nor related HAL_ETH_xyz calls. I did try enabling broadcast in the MACFilter, but this had no effect.#define NET_TASK_DISCO_PORT (5555) #define NET_TASK_DISCO_REQUEST "SCPI_DISCOVERY" #define NET_TASK_DISCO_RESPONSE "SCPI_DEVICE" #define NET_TASK_DISCO_RESP_LENGTH (64) // // @brief Discovery application // @return none // static void disco(void *pArgument) { char response[NET_TASK_DISCO_RESP_LENGTH]; uint16_t length; void *pBuffer; void *pSend; struct netbuf *prBuffer; struct netbuf *prSend; trNet *prNet = (trNet*)pArgument; // V

Hi all,I am implementing a protocol over I2C that requires the STM32 part to act as peripheral and respond to host data reads. I get two types of read transactions: random access, where the controller sends the peripheral address with the WRITE bit set, then a memory address to begin reading, then another start and the peripheral address with the READ bit set. And sequential reads, where the controller doesn't specify an address, it just starts reading. To handle this I need to maintain a "next read address" internally. Here's a diagram of the sequential read:I am using HAL APIs successfully and driving this from FreeRTOS. I'm testing it with an Aardvark debugger standing in for the controller and an Analog Discovery 2 watching the bus and decoding it. My task turns on listen mode. I get the expected calls to HAL_I2C_AddrCallback(). I can successfully distinguish the two types of transactions, get the memory address with HAL_I2C_Slave_Seq_Receive_IT() with FIRST_FRAME, and se