STM32 MCUs

Hy,we are about to create a Proof-of-concept system for a camera application. We want to use STM32N6 Nucleo-144 board (MB1940) Board and add a extension board to CN2, CN3, CN15 and CN16. The project needs Ethernet (which we want to use from Nucleo Board) and PSSI16 Bit (which we want to realize on the extension board).I create a CubeMX project from scratch and select Nucleo Board as starting point.I am not able to configure both, Ethernet and 16 bit PSSI. When I start from the controller itself (no Nucleo) it seems to workWhat do I miss?Best regardsHarald 

I am working with the NUCLEO-N657X0-Q and I am looking for a reference project or a pointer to an example that implements USB Host Mass Storage Class (MSC).My Goal: I need to mount a USB memory stick to read test vectors, process them using the Cortex-M55, and then write the output results back to the USB stick.Current Blockers:I have searched through the latest STM32CubeN6 Firmware Package, but I haven't found a ready-to-use USB Host MSC example specifically tailored for this Nucleo board.Given the new architecture of the STM32N6 (including the high-speed USB PHY and the NPU/M55 pipeline), I want to ensure I am using the correct driver implementation for the USB stack.Does anyone have a pointer to a compatible example or a known working configuration for USB Host on the N6 series? Specifically, I'm looking for guidance on integrating ThreadX/USBX (or the classic middleware) with FileX/FatFs for this board.Any help or GitHub links would be greatly appreciated! 

Sequent Microsystems designs and sells Automation Systems using Raspberry Pi. All our products use STM processors. We use about 10,000 processors per year in different configurations. Generally we do not have any quality problems, but occasionally we run into a defective lot. On a recent run of 30 prototypes using STM32G431CBT6, 50% were defective. We replaced the processors and all boards worked as expected. We buy all out processors from a Chinese distributor.We saved the defective processors and I would like to know if you would have any interest in inspecting them to find out why they entered the distribution chain, and to advise us how to avoid this problem in the future. Mihai BeffaCEOSequent Microsystems

Hello everyone,I’m working with an STM32F103RCT6 on a custom board, and I’m trying to use the built-in RTC using ST Low-Layer (LL) drivers.When I enter debug mode, the application gets stuck inside LL_RTC_Init(). It neither returns SUCCESS nor ERROR — it keeps looping internally, apparently waiting for a flag that never gets set.Here is the function from my application:  void LL_RTC_Init_Custom() { // TODO: RTC clock needs to be set to LSE. On the dev kit, LSE isn't available LL_RTC_InitTypeDef rtcInit = { .AsynchPrescaler = RTC_CLK_PRESCALE, .OutPutSource = LL_RTC_CALIB_OUTPUT_NONE }; ErrorStatus status = LL_RTC_Init(RTC, &rtcInit); if (status != SUCCESS) Error_Handler(); } Inside this function, it stucks here, in this while loop below.ErrorStatus LL_RTC_ExitInitMode(RTC_TypeDef *RTCx) { __IO uint32_t timeout = RTC_INITMODE_TIMEOUT; ErrorStatus status = SUCCESS; uint32_t tmp = 0U; /* Check the parameter */ assert_param(IS_RTC_ALL_INSTANCE(RTCx)); /* Di

Hi,I want to design a voice announcement system using the STM32F103C8T6.My requirement is to Load WAV audio files from an SD card and play them using the STM32, without using any external DAC.I would like guidance on how to start the project using STM32CubeMX / STM32CubeIDE, including:Peripheral configuration in CubeMXAudio playback method without a DAC (for example, PWM-based audio)Basic coding structure to read WAV files from an SD card and play themAny help or reference projects would be greatly appreciated. I have design hardware also here attachment is there please go through it ...Thank you   

Bit-banding Alternatives for Modern ARM Cores Background Information: The bit-banding feature available in ARM Cortex-M cores (ARMv7-M architecture including Cortex-M3 and Cortex-M4) provides hardware-level mapping of individual bits within a 1 MB memory region to words in a 32 MB alias region. This mechanism enables atomic bit manipulation without requiring read-modify-write operations.   Specific Query: For ARM Cortex cores beyond M7 architecture that do not support the bit-banding feature, could you please provide detailed information regarding:   Available alternative methods for atomic bit manipulation Performance implications of these alternatives Recommended implementation strategies for maintaining atomic operations Code examples demonstrating these alternative approaches Request for Documentation

Hello,I am using STM32U5 with an external Winbond W25Q128 (Quad SPI NOR via OctoSPI).Could you please clarify from where an external loader (.stldr) for STM32U5 OctoSPI NOR can be obtained, if available?I checked the following locations and did not find any loader for STM32U5:STM32Cube_FW_U5/UtilitiesSTM32Cube_FW_U5/ProjectsSTM32CubeProgrammer default ExternalLoader directoryIs there an official external loader provided by ST for STM32U5 + OctoSPI NOR, or is it currently not supported?Thank you for the clarification

OverviewI’m working on a custom PCB based on STM32H757BIT6, conceptually similar to the STM32H747I-EVAL board. The original EVAL board uses a Micron MT25TL01G (dual-die) QSPI flash on BK1_CS (PG6). On my board, the flash is replaced with MT25QL01G (single-die) and connected to BK2_NCS (PC11).I need to know what changes are required in the BSP and external loader (.stldr) to make them work with this new flash and cs pin changes.HardwareMCU: STM32H757BIT6QSPI Flash:Original: MT25TL01GHBB8ESF (dual-die)New: MT25QL01GBBB8ESF (single-die)New QSPI CS is connected at BK2_NCS (PC11); BK1_CS is tied to BK2_NCS.ToolsSTM32CubeIDE 1.18.xExternal loader build: IAR EWARMProgrammer: STM32CubeProgrammer v2.18.0ST-LINK FW: V2J46S7Differences vs EVALFlash changed to single-die MT25QLCS moved to BK2Hardware is fixed; BSP/loader adapted from EVALCurrent StatusApp firmware: QSPI init works after making few changes like  FlashID = QSPI_FLASH_ID_1, DualFlash = DISABLE, memory-mapped mode initialization

I'm looking to upgrade one of my years-old BLDC 6 step designs which used STM32F401 and too many other components! I like the look of STSPIN32G4 and so purchased an EVSPIN32G4 development platform.It seems I have successfully worked through MC Workbench 6 Step Wizard, including adding my test motor, without error and one warning - pwm generation "Danger: there is no OCP nor Driver Protection enabled" - this despite there being everything required for this on the EVSPIN board but no option to enable it (can we add this to the wish list please).'Generate the Project' works, I've followed through with CubeMX and IDE, produced code and downloaded to EVSPIN32G4 - all good.ST Motor Pilot connects ok with board, clicking on 'Start', motor briefly kicks before Pilot reporting 'Speed Feedback' fault. Using 'Ack Faults' to clear the error, 'Start' again produces same effect consistently.In 'Advanced Configuration' I notice a 'Speed Kp' value of 2038.  Changing this to -2038, I can now run t

Hello ST Community, I am working with the NUCLEO-WL55JC1 and the official Sigfox_PushButton example. When running the application, the firmware consistently fails during EEPROM emulation initialization. The execution enters E2P_Init() and stops very early inside the function. Observed behavior: After that, the application ends up in Error_Handler() The failure happens every time during startup Project details: Board: NUCLEO-WL55JC1 MCU: STM32WL55JC1 (dual-core CM4 + CM0+) Toolchain: STM32CubeIDE Firmware package: STM32CubeWL Example: Sigfox_PushButton EEPROM configuration:In sgfx_eeprom_if.h, EEPROM emulation is configured as follows: Flash page size: 0x800 (2 KB) EEPROM bank size: 2 pages (4 KB) EEPROM base address set to the last two Flash pages:   EE_BASE_ADRESS = 0x0803F000 (256 KB Flash device, address range 0x08000000 – 0x0803FFFF) I already performed: Full chip erase Clean rebuild Debugging on Cortex-M4 Verification that EEPROM does

Experimenting with STM32F427 and STM32F446 I found out, that the RCC_CR.HSEBYP bit is *not* reset by Software reset. It is reset only by NRST and Power-On reset.While applications where this could lead to problems (i.e. where HSE clock source is changed on-the-fly and software after performing Software reset relies on reset state of this bit) are probably very rare, it may result in an "interesting" surprise if one stumbles upon it, and deserves to be documented.Can ST please confirm/explain and document?Thanks,JW

Hello sir/miss , According to the STM32H7 datasheet, the range of the HSE external crystal oscillator is 4M - 48MHz. However, when we used the STM32H7IIT6-EVAL evaluation board and replaced the original 25MHz surface mount passive crystal oscillator with a 48MHz passive crystal oscillator, we were unable to obtain the corresponding 48MHz frequency from the MCO-PA8 pin. Summary: All conventional passive crystals from 4M to 40MHz were tried and worked fine. However, for external passive crystals above 40MHz , just like 48MHz, the MCO output waveform frequency was 16MHz, which is 1/3 of the HSE frequency, and it was unable to output 48MHz. Please provide a solution or suggest areas where we can improve the test. Thank you very much!

I am working on STM32H753 (with eval board EVAL 2).I am modifying an existing firmware built without libc and without startup files.I need to convert floating point variables to strings, so I want to use as little as libc as possible. I choosed newlib-nano for memory size.I compiled with `-mfpu=fpv5-d16 -mfloat-abi=hard -specs=nano.specs ...` and linked with `-mfpu=fpv5-d16 -mfloat-abi=hard -specs=nosys.specs -specs=nano.specs -u _printf_float -nostartfiles ...`I also added the definition of symbols required by the libc and reserved a memory area for the heap. I tried to write a string from a double variable with the following code (it's code for debug only, I know it may overflow the char array depending on float value):char my_string[64]; double my_double = 1.3; sprintf(my_string, "%.3f", my_double);But the content of the string (checked by dumping the memory on debugger) is `1300` and not `1.300`(i tried with different values and format specifiers)Am I missing something ?

When i give varying PWM signal at high frequency under range, the motor sometimes produces noise and gets stuck (0 speed even though pwm signal is valid). What is the issue? I feel its due to PID tuning. Kindly share PID tuning method.Thanks 

Hello, I have an issue with my touchGFX gauge. First, let me explain what I want to do and how I currently do it. What I want is receiving data from the CANbus which is a command for the gauge to which position the needle needs to point (same as a car). These commands are direct and if I write it directly to the GUI it jumps positions. It needs to move smooth to that position. What I have now is:I receive CAN message with an interrupt. The received CAN message I put in a FreeRTOS queue.From a CanTask I extract the data from the CAN message that is relevant to me and is put in a other queue (aziQueue).In the Model.cpp tick funtion I first had this:if (osMessageQueueGetCount(aziQueueHandle) > 0) { if (osMessageQueueGet(aziQueueHandle, &aziTarget, NULL, osWaitForever) == osOK) { azi = (uint16_t)filter(aziTarget); modelListener->aziUpdate(azi); } } This was blocking the GUI, because the CAN message was send every 100ms on the bus so it slowed down the GUI upda

Hi,We're working on integrating the STM32N6 Getting Started Object Detection and the VENC SDCard examples and were wondering if we could ask some advice on memory allocation?The Object Detection example defines AXISRAM1_S and I think uses this for the camera interface and ISP - if the RAM required by the VENC is added to this then AXISRAM1_S seems to be insufficient and the linker fails.In the examples, the amount of SRAM available for the application seems to be limited by the position SRAM2 at 0x3418 0000 used by the FSBL then later for NN activations:https://github.com/STMicroelectronics/STM32N6-GettingStarted-ObjectDetection/blob/main/Doc/Boot-Overview.md#boot-from-flash-with-first-stage-boot-loaderthis states "STM32N6570-DK: 1MB of SRAM1 is reserved for the User App (see STM32N657xx.ld) and 1MB of SRAM2 is reserved for the network activations (see stm32n6-app2_STM32N6570-DK.mpool)."More detail of the higher sections of memory is given in:https://github.com/STMicroel

Hello Community,We are currently evaluating the STM32H562IGT6 microcontroller for our development project. During our review of the device’s pinout, we observed that several GPIO pins are designated as FT (5‑V tolerant). We would like to request clarification regarding the electrical behavior and long‑term reliability of these pins when subjected to a continuous 5 V digital input.Specifically, we would like to understand whether applying a constant 5 V signal to the FT‑labeled pins may have any impact on product lifetime, derating considerations, or long‑term performance degradation.The following pins are of particular interest for this inquiry:PC0FT_aPC1FT_ahPA0FT_atPA6FT_ahPA7FT_ahPC4FT_aPC5FT_ahPB1FT_ahThank you.Regards,Rajesh Matere

According to the STM32 datasheet, the maximum clock frequency of TIM6 and TIM17 is shown as 64 MHz, while that of TIM1 to TIM8 is shown as 200 MHz. There is a conflict in the documentation, so please confirm which one is correct. (DS14258 Rev6,page 132)The datasheet indicates that the maximum supported clock frequency of SPI is 100 MHz, but no errors are displayed when configuring 200 MHz in CubeMX. Please confirm the actual maximum clock frequency of SPI.

So on the page https://www.st.com/content/st_com/en/stm32-mcu-product-selector.html i cannoy filter out STM32 products which have higher resolution ADC converters built in, i need high resolution input (>16bits or eq SD) and there is no way to select for that.I had more luck on Digikey parametric selector which is odd (and not as good as manufacturer parametric filter/selector)...Also for web designers, some grayscale shading change between sections, rows, columns would be helpful, dark mode (even Digikey and Wikipedia has that option now)!Any advice in case I'm missing something.

Hi, I am working on the STM32N6570-DK board using the Load & Run boot mode.XSPI2 is used to interface the external flash (boot device).XSPI1 is used to interface an external PSRAM.The FSBL is loaded by BootROM and runs from internal SRAM.The FSBL initializes both XSPI2 (for reading the application image) and XSPI1 (for PSRAM).The FSBL copies the application into internal RAM, deinitializes the peripherals, and jumps to the application.Everything works correctly after a power-on sequence (disconnecting and reconnecting board power).However, after any system reset, either by:pressing the reset button on the board, orcalling NVIC_SystemReset() in firmwarethe device does not boot up again and it seems that the FSBL never starts.If the FSBL only initializes XSPI2 (and does not touch XSPI1 at all), the board boots correctly after both power-on and any kind of system reset. I am using STM32Cube FW_N6 V1.2.0 and STM32CubeMx v 6.15.0.

  We are working on a bare-metal application using USBX on an STM32N657X0H3Q device.In CubeMX, we configured USB1_OTG_HS under Connectivity and enabled USBX in Middleware. However, when we execute the following function: static void MX_USB1_OTG_HS_PCD_Init(void) { /* USER CODE BEGIN USB1_OTG_HS_Init 0 */ /* USER CODE END USB1_OTG_HS_Init 0 */ /* USER CODE BEGIN USB1_OTG_HS_Init 1 */ /* USER CODE END USB1_OTG_HS_Init 1 */ hpcd_USB_OTG_HS1.Instance = USB1_OTG_HS; hpcd_USB_OTG_HS1.Init.dev_endpoints = 9; hpcd_USB_OTG_HS1.Init.speed = PCD_SPEED_HIGH; hpcd_USB_OTG_HS1.Init.phy_itface = USB_OTG_HS_EMBEDDED_PHY; hpcd_USB_OTG_HS1.Init.Sof_enable = DISABLE; hpcd_USB_OTG_HS1.Init.low_power_enable = DISABLE; hpcd_USB_OTG_HS1.Init.lpm_enable = DISABLE; hpcd_USB_OTG_HS1.Init.use_dedicated_ep1 = DISABLE; hpcd_USB_OTG_HS1.Init.vbus_sensing_enable = DISABLE; hpcd_USB_OTG_HS1.Init.dma_enable = DISABLE; if (HAL_PCD_Init(&hpcd_USB_OTG_HS1) != HAL_OK) { Error_Handler(); } /* USER CODE BEGIN

Hello All, I'm working on a board, wherein i am using DRAM 256Mb 200MHz with Mfr. No: part no   APS256XXN-OBR-BG (as recommended in STM32N65 DK) but while going through it i found that this part no is not recommended for the new design. Can anyone please share the alternative of this part no or guide in this.       Best Regards, Sakshi     

Hi, I'm a circuit engineer in korea.I want to make really small BLDC FOC controller with STM32G491KE, because It has the smallest pin counts compare to other G491 family.For FOC Control, I have to use three TIM channel. For use external ociliator, I have to use TIM1_CH1_CH1N, TIM_CH2_CH2N, TIM8_CH1_CH1NIf I use TIM channel with that combination, Will FOC controller work well? Is there any differences with TIM1 and TIM8?I want to use 491KE Series for smallest FOC Controller. Thank you. 

So I have a board which I'm correctly using with threadX and TouchGFX.I want to implement a function that calculates the FFT of a signal, but I'm having a hard time finding the CMSIS-DSP libraries.I need to include the classic math library for ARM#include "arm_math.h" #include "arm_const_structs.h"But in cubeMX I'm finding various DSP librarieswhat should I use?

Hi,I am Working on STM32H745XIH6 MCU which embed in our custom board. I have bootloader code which is working fine on STM32H745I-Discovery board. But when I use bootloader in out custom board problem is unable to jump on application code, but same thing is working fine with STM32H745I-Discovery with same bootloader code and application code.I have debug more and got same interesting things happen which mention in below When I flash the application code from STMcubeProgrammer into my custom board and then give power cycle that time jump from bootloader to application code is working fine. When I flash the application code from bootloader into my custom board, that time I will face the issue in jump from bootloader to application code. Then I have check the Flash memory section of application code and compare in both scenario when flash through bootloader or flash through STM32CudeProgrammer. Application code is match properly. So writing into flash memory through bootloader code is wor