STM32 MCUs

I have question on STM32WBA65RI uC we are using it for our products TEK923/926. It seem to me that BLE stack doesn’t allow to use Free Running Binary mode and Calendar Mode.There is option of MIX Mode in CubeMX but doesn’t seem working. Causing not to allow Alarm/Timer to configure and giving below error:  sAlarm->AlarmSubSecondMask               Details:1056964608               Default:1056964608               Decimal:1056964608               Hex:0x3f000000ICSR               Details:519               Default:519       &n

I tried doing an OBD2 request via Car's OBD2 port.I am able to see the CAN BUS traffic using an oscilloscope , just my request frames are rejected by car. I am using STM32h735G-DK development board to send OBD2 requests. It consists of an inbuilt FDCAN transceiver. Settings are fine (removed termination resistor as car already has two), baudrate is 500kbps  with 87.5% sample point. I am using the following code to send OBD2 request frames:I am able to receive CAN frames and able to log CAN frame frames it is just that frames sent are rejected. What am i doing wrong here?FDCAN Code excerpt: /* ============ 500 kbit/s Bit Timing Derivation ============ * * Step 1: FDCAN Kernel Clock * fCAN = 80 MHz (from Clock Configuration) * * Step 2: Prescaler * Prescaler = 10 * * Step 3: Time Quantum (tq) * tq = Prescaler / fCAN * tq = 10 / 80,000,000 Hz = 0.125 µs = 125 ns * * Step 4: Bit Segments (in TQ) * Sync Segment = 1 TQ (fixed, always 1) * Time Segment 1 = 12 TQ (Prop_

My BLE project on stm32wba65 makes use of "UTIL_TIMER_Create" to set a callback. This works ok when the RTC is configured just as free running binary. If I set the rtc mode to mixed binary & bcd, the callback never gets fired. I'm using an LSE to drive the rtc. Why is this? I'm trying to base a project off the BLE_Heartrate example. I need the calendar time & date so I can timestamp data. I synch the time over the BLE from a PC. I suppose I could just use the ms ticks since boot, but how does this survive a reset (but not power outage)? Is the binary counter derived from the rtc sufficiently large enough to hold a date for a year or more? Any examples using binary RTC and external time synch would be most welcome.

Hi, I am currently working on a project where I want to adjust the duty cycle and trigger an ADC measurement on every counter rollover. I managed to get the PWM running in center-aligned mode, but I’m having trouble triggering the counter rollover at the correct moment. To verify whether the trigger is correct, I routed the output compare signal to an external pin and observed it on an oscilloscope. The basic idea is to run an additional counter alongside the PWM. This counter should count up to ARR and then generate a trigger that starts the ADC conversion. Becuase in the center aligned mode two update event occurs both on CNT=0 and CNT=ARR. On the oscilloscope, it looks like the trigger—presumably when CNT = 0 (at least that’s my assumption)—produces an edge. Im using NUCLEO-G491RE. What could I be missing here? What might be causing this behavior?   Yellow (PWM TIM8 Channel3), Blue (PWM TIM8 Channel1), Orange (Capture Compare TIM8 Channel 4) Thank you in advance!

There is something strange happening with STM32N657x0HxQ MCU when HAL tick timer is not using SysTick, but a timer like TIM6, and TIMPRE is changed to 4 or 8 while timer is active. Observed it on DK and custom board.I created isolated test code with CubeMX v6.17.0 for STM32N6570-DK and STM32CubeIDE v2.1.0 to reproduce the issue. IOC file and code in attachment. Test code is in FSBL and it just blinks LED1 with 1 second period. When TIMPRE is 1 or 2, it blinks correctly. To reproduce: Change TIMPRE to 4 or 8 in clock tree and generate + build the code:Power up the board in development mode (BOOT1 = 1). On real application it only happens on cold boot. With this test code it seems to appears all the time.Launch the FSBL with debugger. Debugger should break at HAL_Init(). Press Run. Nothing happens. LED does not blink. Pause debugger and watch uwTick value:CPU is busy in TIM6_IRQHandler and with few seconds, the count has reached 489211. CPU is busy serving only the timer interrupt reques

Hi,I added some follow-up questions to a message but I'm not sure if anyone will notice as I had already clicked "Accepted Solution" :-https://community.st.com/t5/stm32-mcus-security/stm32h5-simple-security-settings/m-p/885235/thread-id/9530#M9531Copying the questions regarding setting H5 security to be more like G4 RDP setting.1) Since the regression to open performs a full chips erase, am I right in thinking that we can use a common and not secure password? i.e. Revealing the password does not allow access to the firmware.2) Can I perform all of the steps listed, from my bootloader firmware? As far as I can see, the changes to product state just require a write to write to an option byte. I have yet to find the part of the reference manual that describes how to write the password file but looking through the scripts in the git repo mentioned seems to suggest that something is written to "address_password=0x8FFF000". (Just noticed - that address looks like H503 only, and for the H563

 Hello,I am using NUCLEO-WB05KN1 development board with the embedded STM32WB05KN MCU.My goal is to advertise in Eddystone UID frame format.Currently I generate the advertising packet manually and insert:10-byte Namespace ID6-byte Instance IDAdvertising works correctly.:question_mark:What I Want To AchieveI want to be able to change:Namespace IDInstance IDremotely from a mobile phone using nRF Connect (by writing to a custom GATT characteristic).This is important because we will deploy many devices in the field and updating IDs over BLE would be very useful.:white_heavy_check_mark:What I ImplementedI created a custom GATT service with two writable characteristics:  uint16_t my_service_handle = 0;uint16_t ns_char_handle = 0;uint16_t inst_char_handle = 0;uint8_t Namespace_ID[10];uint8_t Instance_ID[6];  aci_gatt_srv_attribute_modified_event()I handle write events using:  aci_gatt_srv_attribute_modified_event()   When I receive new data:I u

Hi,I'm working on STM32N6 with CubeMX + X‑CUBE‑AI to deploy a neural network model.The first AI model works fine: no compile errors, runs normally.When I replace the neural network model in CubeMX and regenerate code, I get dozens of compile errors (undefined reference, multiple definition, missing files, etc.).Clean project in IDEDelete build / Objects / Listings foldersReimport the new model in CubeMXRegenerate code completelyI have tried:But the issue still exists. It seems old AI files are not cleaned properly when changing models.Has anyone faced similar issues on STM32N6 when switching AI models with CubeMX + X‑CUBE‑AI?How did you solve this? Thanks for help.

I am recently retired and have used TouchGFX for my past job.  I typically run a Mac, so I decide to buy an inexpensive PC so I can do some development with TouchGFX.  I'm using a GMXtec NucBoxG3_Plus.  I've installed TouchGFX and it runs, but when I try to start a project using either the STM32F469I DISCO or the STM32H743I EVAL2, the progress bar increases to 88%, then hangs and the program exits.  I have about 400GB available on my SSD.  Any ideas?  Thanks

HiHere is my scenario:I want to use USB Type C Connector for Power Delivery(upto 65W) and also, for communicating with STM32F767ZIT6 on my Hardware.Power Delivery is used to charge a 14.4V Li Ion Battery using Battery charger on my hardware. So, And USB Communication takes place with STM32F767ZIT6 Full Speed. Charging and Communication don't need to happen at the same time.So, USB-C Connector will either be used to charge the battery using a AC-DC wall adapter or communicate with STM32 on my hardware using a USB-C Cable from PC. Only one of these things will happen at a time. I was thinking of using STUSB4500 for Power Delivery such that it negotiates 20V, 3.25A with Wall Adapter but it looks like VBUS Sensing PA9 would be a problem when PC is connected(VBUS= 5V) or wall adapter is connected(VBUS= 20V).So, wondering if there are better/easier options to do this? Changing the STM32F767ZIT6 to something like STM32 UCPD MCUs is unfortunately not an option. 

I think this is a very similar (perhaps the same) problem as described here. I replied to that thread but was asked to start a new thread - here it is. I'm reposting because I didn't feel the prior thread has a satisfactory answer (de-initialize and re-initialize the UART).  HAL_UARTEx_ReceiveToIdle_DMA() seems to be intrinsically a very fragile function.  If I call `HAL_UARTEx_ReceiveToIdle_DMA()` when the UART receive line is actively receiving data (when the other end is transmitting). A good percentage of the time it returns HAL_ERROR.I'm using STM32L4 HAL 1.13.6 (Cube 1.18.2).The problem is that the UART generates an overrun error immediately when `UART_Start_Receive_DMA()` enables the overrun error. The overrun error overwrites `huart->ReceptionType = HAL_UART_RECEPTION_STANDARD` which causes `HAL_UARTEx_ReceiveToIdle_DMA()` to return HAL_ERROR as shown in the code snippet from `HAL_UARTEx_ReceiveToIdle_DMA()` below:  /* Set Reception type to

Hi everyone,I am currently looking into the STM32F303CCT6 and I'm a bit confused by the ADC specifications. ST's website mentions it can achieve up to 18 MSPS in interleaved mode. However, looking through the Datasheet and the Reference Manual (RM0316), I don't see a clear way to hit 18 MSPS at 12-bit resolution.I realize the hardware interleaved mode is only dual (e.g., ADC1/2 and ADC3/4). Since the documentation mentions dual mode can reach up to 9 MSPS at 12-bit, and there is no native quad-interleaved mode, I suspect one of two things:There is a way to manually coordinate the two dual pairs (using all 4 ADCs) to reach 18 MSPS at 12-bit.The 18 MSPS claim strictly refers to running a dual interleaved setup at a reduced 6-bit resolution.I would deeple appreciate some insight regarding if 18 MSPS at 12-bit is actually possible on this MCU, or if I am limited to the dual mode specs?Thanks in advance!

I am trying to use the microSD card on the STM32H753I-EVAL2 board with ThreadX and FileX.I generated the base project using CubeMX with the following configuration:Board: STM32H753I-EVAL2Peripheral: SDMMC1 enabledMiddleware: ThreadX + FileXOption "Is external transceiver present?" = Yes (since the board uses the IP4856CX35)Default CubeMX clock configurationHowever, the generated code fails during initialization at:HAL_SD_Init(&hsd1);inside:MX_SDMMC1_SD_Init()After debugging further, I found the failure occurs inside SD_PowerON() when sending CMD55 (APP_CMD).The error returned is:HAL_SD_ERROR_CMD_RSP_TIMEOUTFrom stepping through the code:SD_PowerON()-> SDMMC_CmdAppCommand()-> CMD55-> HAL_SD_ERROR_CMD_RSP_TIMEOUTSo the card never responds to CMD55.Additional observations: CubeMX configures the SDMMC1 kernel clock to 150 MHz. From the reference manual / datasheet, it seems the maximum SDMMC kernel clock should be around 125 MHz.I am not sure if this clock configurat

I've been able to get USB Host working on Nucleo F767I board, but I can seem to get it working on STM32WBA65RI part.   I've tried the following two boards combinations:MB2130A on MB1801D (STM32WBA65I-DK1)MB21230A on MB2143A   (Nucleo-WBA65RI) I've tried the following projects:STM32CubeWBA/Projects/NUCLEO-WBA65RI/Applications/USBX/Ux_Host_HIDSTM32CubeWBA/Projects/NUCLEO-WBA65RI/Applications/USBX/Ux_Host_HID_StandaloneMy own STM32CubeMX based project.I've done all my builds (both the working F767 and failing STM32WBA) using STM32CubeIDE.   I've been able to build, flash, and debug into the executable in all cases.   A fresh clone of STM32CubeWBA from github, I see the expected printed out:USB Host library started.Starting HID ApplicationConnect your HID Device**** USB OTG HS in HID Host ****However, plugging devices in CN9, does not result in them getting detected.   Placing a breakpoint on _ux_hcd_stm32_interrupt_handler does n

Hello,I am trying to use the I3C interface between STM32H523 and DDR5 SPD. I have found a question would like to be answered: Is there any way to send the broadcase address (7'h7E) with SCL signal configured in I2C timing characteristics?According to MIPI I3C Basic specification v1.1.1, page 366, Table 86 I3C Open Drain Timing Parameters, note 9,The Controller uses this timing to send the first Broadcast Address after Bus initialization, in order to disable the I2C Spike Filter for applicable I3C Target Devices (see Section 5.1.2.2.2) (At least 200ns)I have selected the "Bus Characteristics" as "Mixed I3C and I2C" and "I2C Duty Cycle" to be 50% in stm32cubeIDE's "Pinout & Configuration -> Connectivity -> I3C1", It generates the code with "hi3c1.Init.CtrlBusCharacteristic.SCLI2CHighDuration = 0x7c;", which seens fine. But when I run the function "HAL_I3C_Ctrl_TransmitCCC", I found the waveform is different, the SCL high duration is actually controlled by th

I'm reading RM0492 Rev 3 about I2C's controller transmitter. The original words on the page of 1185 areWhen RELOAD = 0 and the number of data bytes defined in NBYTES[7:0] is transferred: • In automatic end mode (AUTOEND = 1), a STOP condition is automatically sent. • In software end mode (AUTOEND = 0), the TC flag is set and the SCL line is stretched low, to perform software actions: – A RESTART condition can be requested by setting the START bit of the I2C_CR2 register with the proper target address configuration and the number of bytes to transfer. Setting the START bit clears the TC flag and sends the START condition on the bus. – A STOP condition can be requested by setting the STOP bit of the I2C_CR2 register. This clears the TC flag and sends a STOP condition on the bus. When a NACK is received, the TXIS flag is not set and a STOP condition is automatically sent. The NACKF flag of the I2C_ISR register is set. An interrupt is generated if the NACKIE bit is set. I'm co

Hi , I have developed a testcase where STM32H503 i3c is in target mode, requesting for controller role request that is going to controller (checked interrupt - Secondary Controller received Controller Role Request ) . After controller is sending GETACCCR command to target but in target side I3C_EVR.CCRUPDF bit is not set. Can you please guide me how to check CRR request. 

This is looking for more info from this original post * https://community.st.com/t5/stm32-mcus-embedded-software/i-am-using-usb-pd-system-with-stm32g071rb76-processor-there-are/m-p/219760#M53483     With a stm32 chip with only one CC line could i connect both of the CC lines together. This is a DFP I don't need VCON support If i were to do this could i still figure out what the orientation is?  

Split from this post. Hello, Sorry to bother you again, but it seems that since yesterday (when I enabled the CAN bus), the UART on my Nucleo has stopped working, even though I haven’t touched anything since then.   To be precise, I’m monitoring my UART signal and I’m only getting ‘framing errors’, obviously, I’ve checked and the baud rates are the same on both sides.   Could activating the HSE clock have disrupted the operation of my UART ?   Thank you in advance for your help,

Dear ST Community,I have successfully run the Object Detection Application on the STM32N6 Discovery Kit using the reference firmware from the STM32AI ModelZoo.As part of extending its functionality, I am looking to implement the following two features:Convert the captured RGB frame to JPEG formatStore the JPEG image onto the SD card available on the Discovery KitFor the RGB-to-JPEG conversion, I have referred to this JPEF Encoder example and integrated this JPEG encoding logic into the object detection firmware. Specifically, I am feeding the nn_in buffer (used as neural network input) to the JPEG encoder. However, during execution, the program gets stuck at this line:jpeg_encode_processing_end = JPEG_EncodeOutputHandler(&hjpeg);The jpeg_encode_processing_end flag is not being set to 1, indicating that the encoding process does not complete. I suspect either the JPEG input handling is not progressing, or the DMA isn't properly triggering the required callbacks.Could you kindly

Hi, I’m trying to configure the FDCAN peripheral on a NUCLEO-STM32H72ZG board, but even though it works perfectly in loopback mode, it doesn’t work when I switch to normal mode. Even in external loopback, when I check with the oscilloscope I don’t see any activity on the TX pin (no signal transitions). The same issue occurs on this board also with GPIOs. I tried the same setup on a NUCLEO-STM32F303RE board (using CAN instead of FDCAN), and everything works perfectly there.      

Dear all,I'm implementing Over-the-air firmware updates for a board using the STM32N657 MCU.In the Appli, I download the new firmware binary over Wifi and store it to RAM at a fixed location in AXISRAM5 and 6. In order to flash the new binary to the OctoSPI Flash I prepend a "magic" header to the new firmware binary (still in RAM) and then restart the MCU using `HAL_NVIC_SystemReset`. Then, after this reset the FSBL checks the fixed location in RAM for the "magic" header. If present, it should flash the OctoSPI Flash with the new firmware binary using the ExtMem Manager (I cannot just flash directly from Appli because I use XIP and hence the Appli is running from OctoSPI in memory-mapped mode, preventing writes). I've done similar things with other MCUs and it worked perfectly fine.However, it looks like on the STM32N6, the contents of AXISRAM5 and 6 are not preserved across software resets. At least, checking the "magic" header in FSBL always produces randomly looking results that are

HiI'm create a project that sending data from RFID reader (RS232) to PC (via USB HID) as a keyboard.I using RS232 to TTL for STM32 can read data and using USB HID to send it to PC.My code is working but a character sending is slow, but when i remove delay, character is missing. Ex: data from RFID: 4F002F144EWhen I have 15ms delay, my PC receive all characterBut when remove 15ms, some character is miss.So I want to ask have anyway to speedup ?This is my loop: while (RingBuffer_Availabel(&ring)) { uint8_t data; RingBuffer_Pop(&ring, &data); if(data == '\r'){ send_enter(); break; } keyboardhid.MODIFIER = (data >= 'A' && data <= 'Z') ? 0x02 : 0x00; keyboardhid.KEYCODE1 = ascii_to_hid((char) data); USBD_HID_SendReport(&hUsbDeviceFS, (uint8_t*) &keyboardhid,sizeof(keyboardhid)); HAL_Delay(15); usb_ready = 0; keyboardhid.MODIFIER = 0x00; keyboardhid.KEYCODE1 = 0x00; USBD_HID_SendReport(&hUsbDevic

 Hello ST Community,We are working with STM32N657X0H3Q and configuring LTDC with internal AXI SRAM.Currently, we have configured the LTDC framebuffer at the following address:0x34200000First, we verified the LTDC functionality without using TouchGFX.Using the same framebuffer address (0x34200000), we manually filled the framebuffer with different colours and confirmed that the display works correctly. The panel turns on and displays the colour patterns properly. This confirms that the LTDC configuration and the memory region are functioning as expected.After enabling TouchGFX, the system starts initialization, but during debugging we observe that execution exits unexpectedly during the TouchGFX initialization phase.In TouchGFX, we have configured the framebuffer using the address method, pointing directly to the same memory location 0x34200000.The issue appears to occur around the following section of the TouchGFX initialization code:FrontendHeap& heap = FrontendHeap::getInsta

Heyho,I recently found that I'm not using ITCM RAM at all, then started to put heap and stack there.No problems so far.Then I copied some functions there, and all went well - until I found some strange behaviour:1..4 SAI RX DMA transfers running, circular modewhen all these transfers are complete for each SAI, a function is called to copy the complete DMA buffer from internal AXI SRAM into the big buffer in HyperRAMalso in this function a packet counter (a global u32 in DTCM) is incremented oncebut when this function is in ITCM, this packet counter increments for each SAI active, but there are no extra packets Further info:- instruction cache: in use- data cache: not used Is there any guideline what to put in ITCM, what are the limits, etcpp. ?