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It doesn't install as the phrase pops up. "can't initialize plugins directory. please try again later​" I've tried everything. Please help me.window10 64bitintel core i7-6700 3.4GHz

Updating the program, even for a minor revision like moving from version 1.16.0 to version 1.16.1, the address of the firmware repository is reverted back to the standard.Due to hard disk space limitation I've changed it to a different location, how can I keep it in the preferences without the need to go and manually change it every time I update?It is a bit annoying, because last time, for example, I dowloaded twice the Firmware packages that I already had but in a different location.Thank you very much for the help. 

@hi_it all, I newly working in USB Host mode configuration in stm32h503rbt6 controller using Keil software(without Hall code),this isn't very easy for me, I can't understand, how to use this method.actually, this implementation is to communicate (stm32 (Host)) with Tablet(device).I spent one week to USB understand this concept but couldn't, so please can you suggest me and share some notes for achieve this configurationThanks,

Hello,I have STM32F767ZI and STM32F429ZI Nucleo board, which I want to configure in TCP Client mode. I have attached .ioc file and tcpclient.c and ethernetif.c files. This files I have downloaded from internet. Now here is my problem when I try to run this code my board is not getting connected to server. For server I am using Hercules software. My board/s are getting from ping response, but not getting connected to server.   void tcp_echoclient_connect(void) { ip_addr_t DestIPaddr; /* create new tcp pcb */ echoclient_pcb = tcp_new(); if (echoclient_pcb != NULL) { IP4_ADDR( &DestIPaddr, DEST_IP_ADDR0, DEST_IP_ADDR1, DEST_IP_ADDR2, DEST_IP_ADDR3 ); /* connect to destination address/port */ tcp_connect(echoclient_pcb,&DestIPaddr,DEST_PORT,tcp_echoclient_connected); } } /** * @brief Function called when TCP connection established * tpcb: pointer on the connection contol block * err: when connection correctly established err should be ERR_OK * @r

Hello! I am trying to enable SPI communication through the SPI3 interface on an STM32F103ZFH6. I am aware that pins PA15 and PB3 are used for JTAG and SWJ, but I have disabled both using:GPIO_PinRemapConfig(GPIO_Remap_SWJ_Disable, ENABLE); There is no clock signal on SPI3_SCK (PB3) and the pin is always low, as confirmed by using a logic analyzer. The SPI3_NSS pins work, after disabling JTAG though.I am certain that the SPI settings, clock, and initialization are correct because data is being sent on the MOSI line, and the NSS pin is manually pulled down correctly during communication, just the clock signal is missing. GPIO settings are also correct as the SCK pin is set to GPIO_Mode_AF_PP. I have also probed for continuity on the PCB and everything is correct. There is a series resistor on the MOSI, MISO, and SCK lines. I have added a screenshot of the logic analyzer output I get. Currently, I think the issue may be a hardware issue in the microcontroller itself, b

Hi, ST.I want to know if the stm32h7(h750vb) series supports sdio? The spec sheet only describes the SDMMC peripheral (memory card etc.), but I want to use SDIO in my project to connect with esp32 to use WIFI (using esp-hosted library). I want to know if there is a way to achieve it?Thanks!

I'm working on a board that has a string of 6 SPI quad FET chips whose outputs I'm trying to PWM in software. The string of FET drivers have a latch signal to transfer the shifted data to the outputs. Because the DMA uses the SPI peripheral's FIFO, I need to generate the latch signal after every 3 bytes DMA'd to the SPI peripheral. It would seem that I need to set the SPI peripheral's FIFO size to 3 bytes and setup a SPI interrupt every time the SPI FIFO has emptied *and* the SPI data register is empty (i.e., after every 3rd byte has been completely shifted out). I don't see a way to set the SPI FIFO size. Since the FIFO size is 32-bits, I could send 4 bytes at a time (with one dummy byte) with the TXEIE (Transmit FIFO ready to be loaded) interrupt bit set, and when that interrupt occurred, if a TX complete interrupt was available I could enable that then to allow me to know when the entire 4-byte sequence was transmitted so that I could synchronously generate the latch signal to the S

For application benchmarking, I would like to access the data memory of the STM32F466RE in a single cycle.What is the data load latency of the STM32F466RE from data SRAM at 84MHz?and, if it is not single cycle, can I reduce the core frequency to decrease the number of SRAM access cycles?Thank you.

I am unable to find documentation on the different registers for hardware. I see registers like `TIM2->CCR1` mentioned everywhere, but I can not seem to find docs for it.Does someone have an idea where I can find the documentation for registers and functions?

I'm trying to debug a Zephyr RTOS application on the STM32H573I Discovery board using the STM fork of openocd and the on-board STLink. I'm running the tools on a Mac M1 machine, and building and flashing the code works fine, using the Zephyr west based toolchain and VSCode.But when I start openocd with this config (copied from STMCube IDE): # This is an genericBoard board with a single STM32H573IIKxQ chip# Generated by STM32CubeIDE# Take care that such file, as generated, may be overridden without any early notice. Please have a look to debug launch configuration setup(s)source [find interface/stlink-dap.cfg]set WORKAREASIZE 0x8000transport select "dapdirect_swd"set CHIPNAME STM32H573IIKxQset BOARDNAME genericBoard# Enable debug when in low power modesset ENABLE_LOW_POWER 1# Stop Watchdog counters when haltset STOP_WATCHDOG 1# STlink Debug clock frequencyset CLOCK_FREQ 8000# Reset configuration# use hardware reset, connect under reset# connect_assert_srst needed if low power mode

Hello,I have a evaluation board STM32L552E-EVAL and I would like the know how to connect the JLINK (EDU) to this board ? According to the instructions I see this connector which could possibly connect with the JLINKThank you for your helps.

Hi,I have a custom board with STM32MP151 and have been trying to run it for quite some time. I have been fixing one mistake after another. But now I can't solve the last problem: [13:11:36:338] F/TC:0 0 probe_driver_node:436 Probing stm32-tamp on node tamp@5c00a000 [13:11:36:344] D/TC:0 0 probe_driver_node:449 element: stm32-tamp on node tamp@5c00a000 deferred 2 time(s) [13:11:36:354] F/TC:0 0 probe_driver_node:436 Probing stm32-cpu-opp on node cpu0-opp-table [13:11:36:357] D/TC:0 0 probe_driver_node:449 element: stm32-cpu-opp on node cpu0-opp-table deferred 3 time(s) [13:11:36:368] D/TC:0 0 process_probe_list:590 Unresolved dependencies after 3 rounds, 3 deferred [13:11:36:377] D/TC:0 0 probe_dt_drivers_early:774 Deferred drivers probing [13:11:36:377] D/TC:0 0 print_probe_list:397 Probe list: 2 elements [13:11:36:388] D/TC:0 0 print_probe_list:399 |- Driver stm32-tamp probes on node tamp@5c00a000 [13:11:36:392] D/TC:0 0 print_probe_list:399 |- Driver stm32-cpu-opp probes on

Hi! I'm working in an application where I want to start a series of ADC conversions every 10 seconds, take a hundred samples and stop the conversions. The way I thought of it is to use a timer (timer 1 in my case) to measure the 10 seconds and use another timer (timer 3) to trigger the ADC conversions. Once the 100 conversions are made, the timer 3 stops until the timer 1 counts to 10 seconds again.The problem that I have is that the timer 3 does the cycle only one time and after disabling the time base inside the ADC callback function I can't start it again from the TIM1 callback function. This works fine only if I don't use HAL_TIM_Base_Stop(&htim3).Am I doing something wrong or this method is not possible?    void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim){ HAL_GPIO_TogglePin(GPIOA, GPIO_PIN_9); HAL_TIM_Base_Start(&htim3); } void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) { HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8, 1); counter++;

I'm unsure whether this is a software issue or wake-up callback is by default not present for UART on STM32U535 microcontroller. The rest of callbacks seems to be in place.

Hello, i am trying to implement Eeprom Emulation on STM32H723 using the code that ST provided in STM32CubeH7-Master for STM32H743 series. In the EE_Init function, first thing that function does is this line of code:   PageStatus0 = (*(__IO uint16_t*)PAGE0_BASE_ADDRESS); #define PAGE0_BASE_ADDRESS ((uint32_t)(EEPROM_START_ADDRESS + 0x0000))  when i look at the value of PAGE0_BASE_ADDRESS, it corresponds to 6U+0x000. Is that normal? Doesnt this mean that we are reading from ITCM RAM?

Good day,we are currently integrating the XCUBE-Dpow library but are running into multiple issues due to the lack of code documentation of the library.- We are not using HTIM Channel-C but -D. After changing multiple entries in the template files of the library, the output works, but High/Low side are inverted.-> Is it possible to invert the dutycycle (High connected to TD2, Low to TD1) or invert the output configuration?We have tried but did not succeed.-> none of the protection functions are integrated, it is unclear if the K value is needed and also, in the documentation the REF value is not inserted into the ADC, as well Channel C is hardcoded.Also, in AN5496, it is missing that for the ramp to work the REF value in the Dpow library has to be set to:(uint16_t)(vLoop.m_Out) - is this correct?Is there any documentation I am missing? Many things are not intercompatible, and there also were some errors to fix after migrating to CubeFW 1.6.0It would also be nice to know which of t

I am working with the ST25DV tags.  I have generated a capability container, TLV Header and Terminator and construct a well-formed NDEF message with 5 records.  I am able to read/write single/multiple blocks and perform most actions that i need in interacting or editing the NDEF records themselves.I am now trying to split the user memory into different sections so that I can lock down RF write of the first 3 records and leave the last 2 records open for both RF read/write.I am currently testing on Android and attempting to open a configuration security session.  I am using the react-native-nfc-manager to help me handle some of the lower level aspects of working with these tags.Here is a simplified version of my function:async function openSecuritySessionAndroid() { if (promptRef.current) { await NfcManager.cancelTechnologyRequest(); await sleep(100); promptRef.current.show('Ready to Scan'); await NfcManager.requestTechnology([NfcTech.NfcV]); } try { const iso156

Hello, I am very new for ST MCU,I have made may own evspin32f0602s1 board , after many trial and errors also after gone through documentation  ,I got  PWM output. but problem is that I  getting it at Reserved pins of MCU (TP1,TP2,TP3 in evolution board) .I have spend so much time but not getting any solution ,Please guide 

Hello, VDD50USB on STM32H755II is powered from external 3.3V supply. What is the general use current consumption of the internal USB regulator? Thanks!

I am using stm32f103c8t6 microcontroller for uploading the bootloader and application. After uploading the bootloader binary code using UART communication (boot1=0 and boot0=1) to the controller, the reset pin is not working for further functionality i.e it is not erasing the current program and the uploaded code is working after pressing the reset button. Please guide me regarding that problem.

Hello, I am using MCSDK_v6.3.1 and encountered a problem when changing TIM1 PWM pins:I cloned B-G431B-ESC1 Devkit Inverter.I changed High Side TIM1 PWM pinsUH: PA8 -> PC2VH: PA9 -> PC1WH: PA10 -> PC0When I now want to create a project with the modified inverter, I get this error:  Error It is not possible to create a motor control project with the FOC algorithm using the selected hardware. No proper path for motor control signals was found for the following mandatory features: - Phase Voltage Generation For more details, please, look at the following log file in your home directory: .st_workbench/connectAlgo.log  I opened connectAlgo.log, but do not see an error.Is this a bug?Thanks 

I need to generate the millivolts of range between (-10mv to 100mv) with three decimal point accuracy using 24-bit external DAC interfaced with NUCLEO-L496ZG board. Is it possible to generate the range?I need HeadsUp & suggestion to achieve the mentioned,Note: yet to purchase DAC

Hello,If I have a design where I am not using the RF pins, is there a recommended way to terminate them? Can you just ground them all?Thanks

 hi i used of CRC in stm32CubeMX and for check true worked CRC used of two online CRC calculator site:https://www.sunshine2k.de/coding/javascript/crc/crc_js.html&https://crccalc.com/?crc=123456789&method=&datatype=0&outtype=0 i think stm32cubeIDE internal CRC use of standard CRC32_MPEG2:Polynomial = 0x4C11DB7Initial value = 0xFFFFFFFFFinal XoR Value = 0x0Input reflected = disableResult reflected = disableAm I correct and have I written the CRC parameter values ​​for stm32f103 exactly right?...........but CRC result for stm32CubeIDE different with online CRC calculator site?example:stm32 CRC for 0x00 = 0xc704dd7bonline CRC calculator site for 0x00 = 0x4E08BFB4 stm32 CRC for 0x01 = 0xc3c5c0cconline CRC calculator site for 0x01 = 0x4AC9A203 stm32 CRC for 0x02 = 0xce86e615online CRC calculator site for 0x02 = 0x478A84DA stm32 CRC for 0xFF = 0x76f39dcfonline CRC calculator site for 0xFF = 0xFFFFFF00 .

Dear ST Community,I am currently modifying an existing schematic to meet my specific requirements for the STM32MP135 Linux board. In line with these hardware changes, I would like to reconfigure and modify the Linux kernel image file accordingly. I need guidance on how to adjust the pin configurations and generate a new kernel image file.Could you please provide a step-by-step procedure for the following:Schematic Modifications:How to align the software configuration with hardware changes made to the schematic (e.g., GPIO, peripherals, or pin functions).Reconfiguration of Pin Settings in Kernel:How to locate and modify the required device tree files or pin control configurations to reflect changes in the schematic.Steps to adjust GPIO pin settings and peripherals in the kernel.Kernel Compilation:Commands or toolchains required to recompile the kernel after modifications.Guidance on rebuilding the Device Tree Blob (DTB) and compiling the kernel image.Deploying the New Kernel Image:How t