STM32F4 ADC DMA Transfer Error

[simon239955]

Posted on February 06, 2016 at 18:06

I am using STM32F407VGT-6 chips.

I use the DMA2 Stream0 with the ADC1 to read analog values. On two of my Boards, the code is working fine and I am not having any problems. On a third Board I programmed today, the DMA does not work (The Transfer Error Interrupt Flag TEIF is set). I then placed the function in which I do my ''ADC_Setup()'' (Look at the code below) at another place in the code on a working Board and it also stopped working. So depending on which functions I call before and after the ADC_Setup() the DMA works fine or does not, although I do not change anything in the ADC_Setup() at all. I tried clearing the DMA EN bit before doing the DMA configuration and clearing the flags before starting the DMA. This did not change anything. It seems that the only thing that influences if the DMA is running or not, is where I place the ADC_Setup() function in the code. And unfortunately on one Board I do not find a place where it works at all. Can someone help me understand this problem?

void ADC_Setup(void)
{
ADC_InitTypeDef ADC_InitStructure;
ADC_CommonInitTypeDef ADC_CommonInitStructure;
DMA_InitTypeDef DMA_InitStructure;
GPIO_InitTypeDef GPIO_initStruct;
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE);
RCC_AHB1PeriphClockCmd((RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB |
RCC_AHB1Periph_GPIOC), ENABLE);
// DMA2 Stream0 channel0 configuration
DMA_Cmd(DMA2_Stream0, DISABLE);
while (DMA2_Stream0->CR & DMA_SxCR_EN);
DMA_InitStructure.DMA_Channel = DMA_Channel_0; //DMA channel 0..7
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&ADC1->DR; //ADC1 Address
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)ADC_Buffer; //uint16_t ADC_Buffer
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory; // Data from Peripheral to memory
DMA_InitStructure.DMA_BufferSize = NBR_OF_CHANNELS; //Number of Data
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; //increment peripheral pointer
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; //increment address pointer
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; //size of data .. 16bit
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; //size of data
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; //start from beginning when end is reached
DMA_InitStructure.DMA_Priority = DMA_Priority_High; //high - only adc exists
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable; //FIFO or direct
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full; //FIFO specific
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single; //specifies the amount of data to be transferred in a single non interruptable transaction
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; //specifies the amount of data to be transferred in a single non interruptable transaction
DMA_Init(DMA2_Stream0, &DMA_InitStructure);
DMA_ITConfig(DMA2_Stream0, DMA_IT_TC, ENABLE);
NVIC_InitTypeDef NVIC_InitStructure;
NVIC_InitStructure.NVIC_IRQChannel = DMA2_Stream0_IRQn;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x0;
NVIC_Init(&NVIC_InitStructure);
DMA_ClearFlag(DMA2_Stream0, DMA_FLAG_FEIF2|DMA_FLAG_DMEIF2|DMA_FLAG_TEIF2|DMA_FLAG_HTIF2|DMA_FLAG_TCIF2);
DMA_Cmd(DMA2_Stream0, ENABLE);
// Configure ADC1 Pins
GPIO_initStruct.GPIO_Mode = GPIO_Mode_AN;
GPIO_initStruct.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_initStruct.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_6 | GPIO_Pin_7;
GPIO_Init(GPIOA, &GPIO_initStruct);
GPIO_initStruct.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5;
GPIO_Init(GPIOC, &GPIO_initStruct);
// ADC1 Init
ADC_DeInit();
ADC_CommonInitStructure.ADC_Mode = ADC_Mode_Independent; //single, dual, triple
ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div6; //max 14MHz aus APB2? (Diller)
ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled; //
ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_20Cycles; //Delay between to ADC-cycles
ADC_CommonInit(&ADC_CommonInitStructure);
ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b;
ADC_InitStructure.ADC_ScanConvMode = ENABLE; //Enable: Multiplexing
ADC_InitStructure.ADC_ContinuousConvMode = ENABLE; //Start next Conv. immediately
ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1;
ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None; //this case: Software trigger
ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
ADC_InitStructure.ADC_NbrOfConversion = NBR_OF_CHANNELS; //number of channels in regular group
ADC_Init(ADC1, &ADC_InitStructure);
// ADC1 regular channel config
ADC_RegularChannelConfig(ADC1, ADC_Channel_0, 1, ADC_SampleTime_480Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_1, 2, ADC_SampleTime_480Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_2, 3, ADC_SampleTime_480Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_3, 4, ADC_SampleTime_480Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_6, 5, ADC_SampleTime_480Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_7, 6, ADC_SampleTime_480Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_10, 7, ADC_SampleTime_480Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_11, 8, ADC_SampleTime_480Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_12, 9, ADC_SampleTime_480Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_13, 10, ADC_SampleTime_480Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_14, 11, ADC_SampleTime_480Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_15, 12, ADC_SampleTime_480Cycles);
// Enable DMA request after last transfer (Single-ADC mode)
ADC_DMARequestAfterLastTransferCmd(ADC1, ENABLE);
// Enable ADC1 DMA
ADC_DMACmd(ADC1, ENABLE);
// Enable ADC1
ADC_Cmd(ADC1, ENABLE);
ADC_SoftwareStartConv(ADC1);
}

[simon239955]

Posted on May 07, 2016 at 11:42

As I did not receive any answers I experimented a little bit and finally found a place where the ADC_Setup() was working.

I then did not have any problems for several weeks until this morning, where I changed something on the code (That had nothing to do with the ADC_Setup(), It was a different function in a different file which is called a many function calls after the ADC_Setup()) and finally I am having the same problem again. Please help me understand and fix this problem. At least a workaround would be good (Reacting to the transfer error, restarting the DMA, ...) Is there any further documentation about how an when the DMA has to be initialized?

[Tesla DeLorean]

Posted on May 07, 2016 at 16:33

Make sure structures are completely cleared or setup, the stack will contain junk, and that occasionally catches people out.

Consider providing complete code examples that compile and run, and that illustrate the failure. If I have build a whole bunch of test code I'm less likely to bother, and will just skim the code statically in my head.

DMA_ClearFlag(DMA2_Stream0, DMA_FLAG_FEIF2|DMA_FLAG_DMEIF2|DMA_FLAG_TEIF2|DMA_FLAG_HTIF2|DMA_FLAG_TCIF2);

Why 2 here, you're trying to clear the bits on Stream 0

[simon239955]

Posted on June 26, 2016 at 00:02

Of course that was a mistake with stream0 and the bits of stream2. I've corrected that. 

I now have ignored the problem for a while, because it worked. It is totally reproducable: I am using FreeRTOS and FreeRTOS+Trace to analyze the runtime behaviour. If I use FreeRTOS+Trace, the ADC over DMA is working. If I comment  the two lines of code that initialize FreeRTOS+Trace and start the trace, so the trace is not running, then the ADC is not working. Otherwise it's not working. I checked the whole code but cannot find any problems. I could send you the whole compiling project, if that helps. It is an Altium Tasking VX-Toolset project. I can strip pretty much of the code, it is still the same, with trace ADC is working, without, it is not working. 

[Tesla DeLorean]

Posted on June 26, 2016 at 18:10

You'd need to condense the failure case example to 250 lines or less.

If you are getting into chip errata type issues, you'd want to review the DMA issues already identified, and the bus speed and expected interactions that might compound issues of bandwidth/contention. Discuss with your local FAE, or reps, or try an Online Support request.

[simon239955]

Posted on June 30, 2016 at 20:20

Hi clive,

I stripped the project down to about 100 lines of code. The only thing that is not included in the code below is the CMSIS and STM32F4xx Standard Peripherals Library and the stm32f4xx_it.c template. The code goes into the interrupt one time with a DMA Transfer Error. If I set the Memory_Inc to disable and use only one channel, than it goes one time into Transfer Complete and the next time to Transfer Error.

#include ''stm32f4xx.h''
#define NBR_OF_ADC_CHANNELS 3
__IO uint16_t ADC_Buffer[NBR_OF_ADC_CHANNELS];
void ADC_Setup(void)
{
ADC_InitTypeDef ADC_InitStructure;
ADC_CommonInitTypeDef ADC_CommonInitStructure;
DMA_InitTypeDef DMA_InitStructure;
GPIO_InitTypeDef GPIO_initStruct;
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
// DMA2 Stream0 channel0 configuration
DMA_InitStructure.DMA_Channel = DMA_Channel_0; //DMA channel 0..7
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t) &ADC1->DR; //ADC1 Address
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t) &ADC_Buffer; //uint16_t ADC_Buffer
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory; // Data from Peripheral to memory
DMA_InitStructure.DMA_BufferSize = NBR_OF_ADC_CHANNELS; //Number of Data
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; //increment peripheral pointer
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; //increment address pointer
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; //size of data .. 16bit
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; //size of data
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; //start from beginning when end is reached
DMA_InitStructure.DMA_Priority = DMA_Priority_High; //high - only adc exists
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable; //FIFO or direct
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull; //FIFO specific
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single; //specifies the amount of data to be transferred in a single non interruptable transaction
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; //specifies the amount of data to be transferred in a single non interruptable transaction
DMA_Init(DMA2_Stream0, &DMA_InitStructure);
DMA_Cmd(DMA2_Stream0, ENABLE);
// Configure ADC1 Pins
GPIO_initStruct.GPIO_Mode = GPIO_Mode_AN;
GPIO_initStruct.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_initStruct.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7;
GPIO_Init(GPIOA, &GPIO_initStruct);
// ADC1 Init
ADC_CommonInitStructure.ADC_Mode = ADC_Mode_Independent; //single, dual, triple
ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div6; //max 14MHz aus APB2? (Diller)
ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled; //
ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_20Cycles;//Delay between to ADC-cycles
ADC_CommonInit(&ADC_CommonInitStructure);
ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b;
ADC_InitStructure.ADC_ScanConvMode = ENABLE; //Enable: Multiplexing
ADC_InitStructure.ADC_ContinuousConvMode = ENABLE; //Start next Conv. immediately
ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1;
ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None; //this case: Software trigger
ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
ADC_InitStructure.ADC_NbrOfConversion = NBR_OF_ADC_CHANNELS;//number of channels in regular group
ADC_Init(ADC1, &ADC_InitStructure);
// ADC1 regular channel config
ADC_RegularChannelConfig(ADC1, ADC_Channel_5, 1, ADC_SampleTime_480Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_6, 2, ADC_SampleTime_480Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_7, 3, ADC_SampleTime_480Cycles);
DMA_ITConfig(DMA2_Stream0, DMA_IT_TC, ENABLE);
DMA_ITConfig(DMA2_Stream0, DMA_IT_TE, ENABLE);
NVIC_InitTypeDef NVIC_InitStructure;
NVIC_InitStructure.NVIC_IRQChannel = DMA2_Stream0_IRQn;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x0;
NVIC_Init(&NVIC_InitStructure);
// Enable DMA request after last transfer (Single-ADC mode)
ADC_DMARequestAfterLastTransferCmd(ADC1, ENABLE);
// Enable ADC1 DMA
ADC_DMACmd(ADC1, ENABLE);
// Enable ADC1
ADC_Cmd(ADC1, ENABLE);
ADC_SoftwareStartConv(ADC1);
}
void main(void)
{
// Reset ADC-Buffer
memset((uint16_t*)ADC_Buffer, 0, sizeof(uint16_t) * NBR_OF_ADC_CHANNELS);
ADC_Setup();
for( ;; );
}
void DMA2_Stream0_IRQHandler(void)
{
if (DMA_GetITStatus(DMA2_Stream0, DMA_IT_TCIF0))
{
DMA_ClearITPendingBit(DMA2_Stream0, DMA_IT_TCIF0);
}
if (DMA_GetITStatus(DMA2_Stream0, DMA_IT_TEIF0))
{
DMA_ClearITPendingBit(DMA2_Stream0, DMA_IT_TEIF0);
}
}

[Tesla DeLorean]

Posted on June 30, 2016 at 21:31

Reframed this into a STM32F4-DISCO project, added some status LEDs into the IRQ. Enabled asserts. Building with Keil. Get a constant stream of TC, no TE being asserted.

CPU @ 168 MHz, APB1 @ 42 MHz, APB2 @ 84 MHz

[simon239955]

Posted on June 30, 2016 at 22:11

Thanks for the fast reply.

I downloaded the free IDE CoIDE, Copied the files into a CoIDE project (ARM GCC compiler) and flashed it onto my own board and it also works fine? (Same bus speeds as you mentioned)I tried three different debuggers with the Tasking-VX Toolset (Segger J-Link, Embedded ST-Link via DISCO-Board, ST-Link-V2). I always get TE Error.So the only thing I can now imagine is a sporadic compiler error, as it is working in some projects while it does not in others. I am completely confused by now but I guess I just can say thank you once again for the very fast support and contact Altium

[Tesla DeLorean]

Posted on June 30, 2016 at 23:09

Point them at the thread if need be. I suspect you'd want to dump out the DMA registers to see what was different between the two, or check if there isn't a field missing somewhere.

This is what I build for the F4-DISCO, might be easier for them to replicate vs custom hw.

#include ''stm32f4_discovery.h''
#include <
stdlib.h
>
#include <
string.h
>
#define NBR_OF_ADC_CHANNELS 3
__IO uint16_t ADC_Buffer[NBR_OF_ADC_CHANNELS];
void ADC_Setup(void)
{
ADC_InitTypeDef ADC_InitStructure;
ADC_CommonInitTypeDef ADC_CommonInitStructure;
DMA_InitTypeDef DMA_InitStructure;
GPIO_InitTypeDef GPIO_initStruct;
NVIC_InitTypeDef NVIC_InitStructure;
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
// DMA2 Stream0 channel0 configuration
DMA_InitStructure.DMA_Channel = DMA_Channel_0; //DMA channel 0..7
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t) &ADC1->DR; //ADC1 Address
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t) &ADC_Buffer; //uint16_t ADC_Buffer
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory; // Data from Peripheral to memory
DMA_InitStructure.DMA_BufferSize = NBR_OF_ADC_CHANNELS; //Number of Data
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; //increment peripheral pointer
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; //increment address pointer
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; //size of data .. 16bit
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; //size of data
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; //start from beginning when end is reached
DMA_InitStructure.DMA_Priority = DMA_Priority_High; //high - only adc exists
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable; //FIFO or direct
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull; //FIFO specific
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single; //specifies the amount of data to be transferred in a single non interruptable transaction
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; //specifies the amount of data to be transferred in a single non interruptable transaction
DMA_Init(DMA2_Stream0, &DMA_InitStructure);
DMA_Cmd(DMA2_Stream0, ENABLE);
// Configure ADC1 Pins
GPIO_initStruct.GPIO_Mode = GPIO_Mode_AN;
GPIO_initStruct.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_initStruct.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7;
GPIO_Init(GPIOA, &GPIO_initStruct);
// ADC1 Init
ADC_CommonInitStructure.ADC_Mode = ADC_Mode_Independent; //single, dual, triple
ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div6; //max 14MHz aus APB2? (Diller)
ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled; //
ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_20Cycles;//Delay between to ADC-cycles
ADC_CommonInit(&ADC_CommonInitStructure);
ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b;
ADC_InitStructure.ADC_ScanConvMode = ENABLE; //Enable: Multiplexing
ADC_InitStructure.ADC_ContinuousConvMode = ENABLE; //Start next Conv. immediately
ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1;
ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None; //this case: Software trigger
ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
ADC_InitStructure.ADC_NbrOfConversion = NBR_OF_ADC_CHANNELS;//number of channels in regular group
ADC_Init(ADC1, &ADC_InitStructure);
// ADC1 regular channel config
ADC_RegularChannelConfig(ADC1, ADC_Channel_5, 1, ADC_SampleTime_480Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_6, 2, ADC_SampleTime_480Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_7, 3, ADC_SampleTime_480Cycles);
DMA_ITConfig(DMA2_Stream0, DMA_IT_TC, ENABLE);
DMA_ITConfig(DMA2_Stream0, DMA_IT_TE, ENABLE);
NVIC_InitStructure.NVIC_IRQChannel = DMA2_Stream0_IRQn;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x0;
NVIC_Init(&NVIC_InitStructure);
// Enable DMA request after last transfer (Single-ADC mode)
ADC_DMARequestAfterLastTransferCmd(ADC1, ENABLE);
// Enable ADC1 DMA
ADC_DMACmd(ADC1, ENABLE);
// Enable ADC1
ADC_Cmd(ADC1, ENABLE);
ADC_SoftwareStartConv(ADC1);
}
/**************************************************************************************/
int main(void)
{
STM_EVAL_LEDInit(LED3); /* Configure LEDs to monitor program status */
STM_EVAL_LEDInit(LED4);
STM_EVAL_LEDOff(LED3);
STM_EVAL_LEDOff(LED4);
// Reset ADC-Buffer
memset((uint16_t*)ADC_Buffer, 0, sizeof(uint16_t) * NBR_OF_ADC_CHANNELS);
ADC_Setup();
while(1);
}
/**************************************************************************************/
void DMA2_Stream0_IRQHandler(void)
{
static int i = 0;
if (DMA_GetITStatus(DMA2_Stream0, DMA_IT_TCIF0))
{
DMA_ClearITPendingBit(DMA2_Stream0, DMA_IT_TCIF0);
if ((i++ % 1000) == 0)
STM_EVAL_LEDToggle(LED3);
}
if (DMA_GetITStatus(DMA2_Stream0, DMA_IT_TEIF0))
{
DMA_ClearITPendingBit(DMA2_Stream0, DMA_IT_TEIF0);
STM_EVAL_LEDOn(LED4);
}
}
/**************************************************************************************/
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t* file, uint32_t line)
{
/* User can add his own implementation to report the file name and line number,
ex: printf(''Wrong parameters value: file %s on line %d

'', file, line) */
/* Infinite loop */
while (1)
{
}
}
#endif

[simon239955]

Posted on July 01, 2016 at 00:11

Thanks I will forward the code to them. 

I now switched to a discovery-board myself to be able to flash the same project with Tasking and CoIDE. Obviously there are differences, but it is difficult for me to interpret it, as I can only look up the different register bits but do not know the exact changes (error reaction) as the DMA has an error in the tasking project. For completeness I post the register dumps of the identical discovery board projects:  

Tasking with error:

DMA2.LISR = 0x0

DMA2.HISR = 0x0

DMA2.LIFCR = 0x0

DMA2.HIFCR = 0x0

DMA2_Stream0.CR = 0x22d14

DMA2_Stream0.NDTR = 0x2

DMA2_Stream0.PAR = 0x4001204c

DMA2_Stream0.M0AR = 0x10000000

DMA2_Stream0.M1AR = 0x0

DMA2_Stream0.FCR = 0x21

CoIDE Working:

DMA2.LISR = 0x30

DMA2.HISR = 0x0

DMA2.LIFCR = 0x0

DMA2.HIFCR = 0x0

DMA2_Stream0.CR = 0x22d15

DMA2_Stream0.NDTR = 0x1

DMA2_Stream0.PAR = 0x4001204c

DMA2_Stream0.M0AR = 0x20000000

DMA2_Stream0.M1AR = 0x0

DMA2_Stream0.FCR = 0x21