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STM32L Max Voltage to FT pin while unpowered

Dan Hepler
Associate III
Posted on August 01, 2014 at 02:45

Can someone confirm if applying ~5.0V to a 5V tolerant pin on an STM32L151 while unpowered (VDD=0.0V) will damage it?

The latest datasheets specify the Absolute Maximum Ratings are VDD+4.0V for FT pins, but bench testing it appears that I can apply 5.5V to an FT pin while the device is unpowered and when I power it up it works fine.

However... I have received two units that failed and suspect ~5V was applied to FT pins while the microcontroller was unpowered which may have caused the failures.

Thanks in advance.

#stm32l1xx #i2c #gpio #stm32l
7 REPLIES 7
Posted on August 01, 2014 at 02:56

Single pin failure, or whole device failure?

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Dan Hepler
Associate III
Posted on August 01, 2014 at 22:55

I am still investigating the units, and should know next week.  I'll update this thread.  My question is to confirm whether or not ~5V applied to FT pins while the device is unpowered is OK.

Posted on August 02, 2014 at 00:36

Yes, I understood that, ST really doesn't describe the IO cell structure with enough detail to know where the current might go, although the 5V tolerance would tend to suggest it won't back feed into the 3V IO rail. I was trying to establish if the damage was localized, or catastrophic.

Generally what would happen in your circumstance is it would effectively supply the device through the IO pins, and run it.

Your question might be better posed to your FAE
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Dan Hepler
Associate III
Posted on August 13, 2014 at 21:02

Update: It turns out there was no damage to the STM32L151 chip at all.  The unit failures were due to a supply rail failing.  Once that was fixed the units worked fine.  To be explicit: the 5V tolerant (FT) I2C pins are still working fine and are subjected regularly to short durations of 5V while the device is unpowered (VCC is 0V).

I was actually instructed to post my question here while I waited for a response from my FAE because apparently all the FAEs and support people are on vacation.  I will update this thread if/when I learn more.

Posted on August 13, 2014 at 23:01

...apparently all the FAEs and support people are on vacation.

Most of Europe disappears for August, not that they ever seem to come here and participate, or the IC design group guys either, as best I can tell.

If you don't want the device doing unpredictable things, you might want to consider a power-on-reset chip on your actual STM32 supply, and clamp the device in reset with that.

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doug23
Associate
Posted on August 15, 2014 at 04:46

Hey there, I am going to get an FAE to help confirm the Max Voltage. Doug

Dan Hepler
Associate III
Posted on September 04, 2014 at 23:31

The FAE response is: ''

the max voltage allowed on a 5V 

tolerant

 IO with VDD=0V is 4V'' which is just repeating what the absolute maximum section of the datasheet, but no additional information on what type of damage may occur (it appears NONE based on my testing).  I am dropping this investigation for now, but will update this thread if I find out any more.  Thanks guys.