SPI 24 bit

[richardsanden9]

Posted on March 06, 2009 at 19:30

SPI 24 bit

[richardsanden9]

Posted on May 17, 2011 at 13:05

My Cortex M3 will be the SPI slave. The master is sending data across the SPI bus using 24 bit format instead of 8 or 16 bits. Do I configure my slave to be 8 bit and read it at 8 bits at a time. Do I need to worried about buffer overruns? Does the CS matter in this case? I am new to SPI.

Thanks

[jj]

Posted on May 17, 2011 at 13:05

SPI Suggestions:

a) Simplify - insure that your Master device sends the least amount of data during early testing. Try to prevent ''over-use'' of buffers during troubleshooting/check-out b) Confirm your ''data shift out'' theory by changing the STM32 to 16 bit data length c) Check current STM32 device errata to see if the SPI port you've chosen ''competes'' or is effected by any special conditions/set-up. Avoid these ''like the plague'' during your learning/experimentation...

[jj]

Posted on May 17, 2011 at 13:05

Hi-

Oh boy - sacre bleu! 24 bit SPI has been ''sore spot'' with many ARM uCs - not just STM32. There are multiple posts throughout this forum - including fairly recent ''wish-list'' - which will provide much needed education/background for you. Fear there is ''not'' quick/easy answer for you - much simpler if you can someway/somehow convert the master to 8/16 bit transfers...

[richardsanden9]

Posted on May 17, 2011 at 13:05

The previous posts helped a little. I tried 8 bit data format and got buffer overruns. I am assuming that it is because the data is only shifted out of the registers on a CS state change. Since the CS only happens on the 24 bit boundry we get a buffer overrun and lose 16 bits of data. Is this correct? So is the trick to control the CS via the software mode on the slave side.

Thanks