Synchronizing SPDIFRX and SAI clocks

[Giulio Girardi]

Posted on August 29, 2017 at 15:09

Hi everyone,

For the last week I've been trying to capture a SPDIF stream (at 48000 Hz) through the SPDIFRX peripheral with the STM32F745 MCU and redirect it through a SAI output (connected to an external DAC).

The main issue I've been facing so far is the difference between the SPDIF clock, which is generated by the external SPDIF device I've connected to the MCU, and the SAI clock, which is being generated by a PLL in the MCU. This means that the two interfaces' DMAs trigger with a slightly different frequence, and this leads to a periodic stream data corruption.

What I'd prefer not to do:

• Resampling;
• Polyphase filtering;
• In general, time consuming operations.

What I've tried so far (without success):

• Configuring two different PLLs, one to generate a frequency slightly higher than 48000 Hz, the other slightly lower. I've than implemented an algorithm that swaps the PLL that the SAI peripheral is currently using, with the other, whenever the SAI DMA is about to go out of sync. This approach sort of works, but the final stream jitters way too much, creating a tremolo effect;
• Changing the other PLL frequency when the SAI is clocked on the other to adapt it to the SPDIF clock. This approach doesn't work because changing the PLL frequency requires that the PLL itself is disabled, but the SPDIF peripheral needs an internal clock too, which is one of the two PLL I can use for the SAI, so switching it off kills the SPDIF reception;
• Swapping the clocks every DMA cycle, to avoid the jitter. This doesn't work either, because it modulates the stream, creating too many harmonics.

My last possibility:

In the MCU reference manual (RM0385) paragraph 34.3.10 (SPDIFRX Symbol Clock Generation) is reported:

The SPDIFRX block provides a symbol clock on signal named spdifrx_ck_symb, which

can be used as the reference kernel clock for another audio device such as SAI or SPI/I2S.It could be used for SPDIFRX to I2S bridge function.

But this signal isn't reported anywhere else.

What should it be connected to? A timer? The PLL itself? A GPIO pin?

Is there any snippet of code describing how to use it or someone who has tried this functionality?

Thanks in advance

#clock-syncing #spdif #dsp

[waclawek.jan]

Posted on August 29, 2017 at 15:49

The SPDIFRX block provides a symbol clock on signal named spdifrx_ck_symb, which

can be used

Probably input to TIM11_CH1 when  TIM11_OR.TI1_RMP set to 0b01, labelled as 'SPDIFRX Frame synchronous', which obviously is result of some bogus 'spelling correction'. See 'F446 RM where it's spelled out correctly.

Nevertheless, I don't know the answer to your original question. There used to be a thread where somebody attempted to tune the PLL by changing its division factor on-the-fly regardless of what's written in the RM; but I can't find that thread nor do I know what was the outcome. I'd like to hear some comment on this from ST too.

JW

[Giulio Girardi]

Posted on August 29, 2017 at 16:05

Actually I had read about this signal as well, which is reported in the manual as the other signal generated by this peripheral (other than the spdifrx_ck_symb). It is indeed referenced in the TIM11_CH1 section of the manual, but it doesn't seem to be what I need, because the frame clock (which I suppose should be 48000 Hz, the frame rate) is calculated from the PLL frequency, so in order to avoid any possible jitter it would be better if I were able to use the spdif_ck_symb (symbol rate) for the PLL rather than calculate its frequency (with possible precision errors). Of course, as you said, if it's not a spelling error.

[waclawek.jan]

Posted on August 29, 2017 at 17:38

other signal generated by this peripheral (other than the spdifrx_ck_symb

Indeed. Sorry for the confusion.

Looked into AN4676 and only the spdifrx_frame_sync-to-TIM11 connection is mentioned there, too.

Another question to ST, then.

JW

[Amel NASRI]

Posted on October 04, 2017 at 17:15

Hi

Waclawek.Jan

‌ and

giulio.girardi

‌,

I confirm that the signal spdifrx_ck_symb is wrongly added in RM0433 (STM32H7), RM0390 (STM32F446) and RM0385 (STM32F75x/4x).

Thanks for bringing this error to our attention and sorry for the confusion it created in your side.

-Amel

[Dieter Steinwedel]

Posted on October 31, 2017 at 11:31

I have the same question as

giulio.girardi

and I haven't found a solution till now. I have also found, that TIM11 can measure the frequency of the spdif input. But I have not found a solution to output a spdif clock on a pin as master clock or/and to synchronize the sai to the spdif clock.

[waclawek.jan]

Posted on January 16, 2018 at 15:37

I is a pity that spdifrx_ck_symb is not available - this is a useful feature missing.

SAI/I2S sync to SPDIF-Rx turns to be a challenge then.

I could envisage outputting spdifrx_frame_sync indirectly somehow through some obscure TIM feature, and feed it to an external PLL (there are CODECs incorporating such PLL) and then use that as clock source for SAI/I2S. Or have an external VCO and run the PLL's phase compare and feedback in software. Definitively a pain in the ***.

JW

PS. I use this opportunity to repeat the request for adding the 'interconnections' chapter to ALL STM32 RMs, and to improve the existing ones to include ALL interconnections.