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Dear ST Support Team,I am working with the STM32MP257F-EV1 evaluation board and have found an issue with some of the on-board crystals while checking their clock frequencies.Observations:- X1: no frequency is observed- X2: no frequency is observed- X7 (ST-LINK crystal): a correct frequency of 24 MHz is observed againCould you please help me with the following:1. Possible reasons why X1 and X2 are not oscillating on this board.2. Any recommended checks (supply, load capacitors, bias, probing method) to confirm whether this is a hardware fault or a measurement issue.3. Whether this could be a defective board, and if so, the process for replacement or repair.I can share measurement screenshots, photos of the board, and further details if needed.Thank you for your support. I look forward to your reply.Best regards,Radha
@JL. Lebon Dear ST Engineer,Thank you for your previous assistance. I have two further technical questions regarding the power management and timing parameters of the ST25DV chip:1. Concerning the VCC Rise Rate Limitation The datasheet states in the Power Management section: "When the power supply is turned on, VCC rises from VSS to VCC. VCC must not rise faster than 1 V/μs."In my ultra-low-power application, I connect the ST25DV VCC pin to a MCU GPIO pin, accompanied by a 10nF decoupling capacitor. During actual measurement, I observed that the initial rise rate of VCC is approximately 2 V/μs (specifically, the rise time from 0V to 1V is about 0.44 μs, as shown in the attached waveform). Could you please clarify:What is the underlying physical reason or risk consideration for this 1 V/μs limit? Given my specific hardware configuration (GPIO-driven + 10nF cap), is the observed rise rate of ~2 V/μs acceptable for reliable operation, or does it pose a potential risk to the chip?2.
Hai, I am trying to read the data stored in the EEPROM via I²C during the U-Boot SPL stage.The EEPROM data can be read successfully from both U-Boot and user space, as shown below. Uboot Area:iWave-G62H>iWave-G62H> i2c dev 0Setting bus to 0iWave-G62H> i2c md 0x50 0x0000.2 10000: 99 .iWave-G62H> i2c md 0x50 0x0000.2 10000: 99 .iWave-G62H> i2c mw 0x50 0x0000.2 0x01 1iWave-G62H>iWave-G62H> i2c md 0x50 0x0000.2 1 0000: 01 .iWave-G62H> i2c md 0x50 0x0000.2 10000: 01 .iWave-G62H> User Space:root@imx91-iwg62h:~#root@imx91-iwg62h:~# dd if=/sys/bus/i2c/devices/0-0050/eeprom bs=1 count=1 2>/dev/null | hexdump -C00000000 01 |.|00000001root@imx91-iwg62h:~#root@imx91-iwg62h:~#root@imx91-iwg62h:~# printf '\x99' | dd of=/sys/bus/i2c/devices/0-0050/eeprom bs=1 count=1 1+0 records in1+0 recor
Hello ST, I have used this project \STM32CubeN6\Projects\STM32N6570-DK\Examples\PWR\PWR_STANDBY_RTC I have modified the project so that it enters stop mode instead of standby. The code that enters stop mode is put in a while(1) loop that looks like thiswhile(1) HAL_SuspendTick(); HAL_PWR_EnterSTOPMode(0, PWR_STOPENTRY_WFI); SystemClock_Config(); HAL_ResumeTick(); Toggle_leds(); // toggles the green led 50 times } All unused Gpios are set as analogue inputs Turned off RTC (wake up by button press instead)put the NOR flash into deep power-down and tears down XSPI2/XSPIM, the IC3 clock divider and LSI. It keeps the flash chip-select held high with a pull-up. Is the measured current higher than expected? How come VDIO is so high? VDDA1V8 can also be reduced i think, but how?The board is powered via CN18.
We are using MotionMC v2.9.0 on STM32F407 with an LIS2MDL magnetometer and LSM6DSV16X IMU.Our application is an astronomical Alt-Azimuth mount, therefore the sensor can rotate around azimuth and altitude axes, but cannot be freely tumbled around all three axes.MotionMC is updated approximately every 10 ms (100 Hz), with LIS2MDL magnetic data converted to µT.During a test session we performed multiple azimuth sweeps at different elevations. After approximately 54,000 MotionMC updates the observed raw magnetic coverage was approximately:X span: 533 mGY span: 738 mGZ span: 616 mGDespite this relatively wide 3-axis magnetic coverage, MotionMC remained at quality 0 (UNKNOWN) for the entire session. Hard-iron bias remained {0,0,0} and the soft-iron matrix remained identity.With unrestricted manual 3D tumbling of the same hardware, MotionMC is able to reach GOOD calibration.We would like to understand whether MotionMC requires unrestricted 3-axis tumbling, or whether a two-degree-of-freedom A
As far as I can tell from the naming, this is the file which is supposed to cover both the non-suffixed and J-suffixed STM32C552Rxx. However, I can’t see any, e.g. mention of the PE2..PE5 pins which are present for the J-suffix.I still would very much like to see the ‘C5 family covered also by the “old style” xml in the Open pin data.JW
Hello, I am trying to interface Audio codec with stm32wba65 (using reference: GitHub - stm32-hotspot/STM32WBA-Advanced-BLE-Broadcast-Speaker: The BLE Speaker is a prototype for a portable Bluetooth® Low Energy speaker supporting broadcast sink, scan delegator role and optionally unicast server role · GitHub ) , there is an additional MCU between STM32WB55 and Audio codec but i am thinking to use the audio codec directly over SAI1. as SAI1 has 2 blocks SAIA and SAI B. Is it possible to interface audio codec via one block (SAI A) and any other MIC (I2S or PDM) another block (SAIB) ? can someone please tell if it is possible .If yes can plz provide ioc settings.? what things to be take into care?Regards,D
I am looking at the datasheet and reference manual for the STM32H750. I am trying to learn about the connections between buses and I saw on the reference manual that AHB2 in the D2 domain has no master bus port, however the datasheet shows an AHB/APB bridge between buses labeled AHB2 and APB2. later in section 2.1.3 of the reference manual, there is no mention of an AHB2 to APB2 connection. What does this mean for accessing peripherals on the AHP2 peripheral bus, is it intended for AHB1 as per the reference manual, or through AHB2 as per the datasheet, or is there another way I am not seeing?Reference manual Diagram showing no AHB2 → APB2 connectionDatasheet Block Diagram showing APB2 connection to AHB2 through AHB/APB bus bridge (blue box)
Unable to install on Linux Mint 22.3 xfce
We have begun work on a new project based on RFID technology, specifically utilizing the ST25R3915. For simulation purposes, we require an IBIS model for this chip; however, I have been unable to locate one on your website. Would it be possible for you to provide an IBIS model so that we may perform PCB simulations prior to manufacturing?Thank you in advance!Best regards!
Hello all,The problem that I’m facing is that two specific zones are showed in white color in my screen. These zones only appear in a circleProgress that is based in an image.I am using the TouchGFX version 4.26.1, and the MCU is a STM32U575CIUX.These problem only happens when I save data on the persistent memory of the MCU with this function (source code below):// Write into flash memorybool PERSIST_write(RegistroFlash *persist_memory_to_write){uint32_t address = USER_FLASH_START_ADDRESS;uint8_t *ptr = (uint8_t *)persist_memory_to_write;FLASH_EraseInitTypeDef erase;uint32_t pageError;HAL_StatusTypeDef program_ok_result = HAL_ERROR;bool function_ok_result = false;// Unlock the flash memory to write thereHAL_FLASH_Unlock();// Erase the corresponding flash page (in my case only the last page 255)// Although we do not use it completely a complete page must be deleted (2 KB)erase.TypeErase = FLASH_TYPEERASE_PAGES;erase.Page = (USER_FLASH_START_ADDRESS - FLASH_BASE) / FLASH_PAGE_SIZE;erase.
Hi everyone,I'm having a very annoying issue with an STM32U5G9ZJ and a Newhaven NHD-4.0-480480AF-MSXP-CTP display using an ST7701SN over 2-lane MIPI DSI.The basic communication works, but I cannot get any video onto the display.What worksThe panel responds correctly to LP short DSI commands:Reset works. ST7701 registers can be read. The initialisation sequence runs successfully. 0x29 Display ON works. 0x23 All Pixels On makes the display white.So the panel and the LP DSI communication are working.What doesn't workAs soon as I try to send RGB888 video over HS DSI, the display stays black.I've tested this both using the LTDC/framebuffer and the internal pattern generator. The latter was to rule out the framebuffer/LTDC completely.The pattern generator starts successfully and the DSI registers show the video engine and both data lanes entering an active HS state, but the panel still stays black.I'm using:2 DSI lanes RGB888 Burst video mode 480 × 480 480 packet size Continuous clock Automa
I am working on a project involving communication between an STM32H753 and an FPC2534. I have successfully connected the two components, and the system works as expected; however, it stops functioning when I enable the I-cache and D-cache on the STM32H753. Could you explain why this happens?
Hi!I’m using this commangst-launch-1.0 -v filesrc location=bbb.mp4 ! qtdemux ! h264parse ! v4l2slh264dec ! waylandsink fullscreen=trueTo play video in 1080p without lagging. But this comes without sound.How can I play sound with gst-launch-1.0?I can only play sound with “aplay /path/to/file.wav”.
Hello,I would like to report an issue encountered with the "STM32CubeWiSE - Bluetooth LE Explorer" tool, version 1.1.0.I am using a custom board equipped with an STM32WBA65, running firmware in "TransparentMode."To connect my board to the PC, I am using an FTDI USB-to-serial adapter.The problem occurs when the tool opens the COM port: the first command, "HCI_READ_LOCAL_VERSION_INFORMATION," fails because 4 unexpected characters (0xFF, 0x01, 0x00, 0x00) are sent by the PC.Even the retry attempt, which occurs one second later, fails because the HCI protocol is no longer synchronized.Consequently, the tool fails to recognise the chip and is not usable.This issue does not occur with the Nucleo board's USB-to-serial adapter.STM32CubeMonitor-RF 2.19.0 works fine.As a workaround, I modified the firmware to ignore the 3 next characters when its get an invalid packet indicator with value 0xFF.BRAnthony S
Hi everyone,We’re currently evaluating the LSM6DSV16X for a multimodal data acquisition application and are using its Machine Learning Core (MLC) to detect specific events and generate corresponding labels in a time-series data stream.To ensure accurate temporal alignment between different data sources, we’d like to understand the latency between the actual occurrence of a physical event and the availability of the corresponding MLC output.Has ST characterized this latency or published any relevant specifications, test results, or documentation? If not, is there a recommended test procedure or validation methodology for measuring it reliably?Any insights or suggestions from the ST team or community members with experience using the MLC would be greatly appreciated.Thanks in advance for your help!
Hi,I'm trying to program a blank STM32H573 through the embedded system bootloader over I2C4, but the bootloader does not respond.SetupBlank flash, product state Open, BOOT0 = 1 (measured at the MCU pin), board power-cycled Host: Aardvark I2C master at 100 kHz, address 0x65 (per AN2606) No debugger, USB or UART connectedResultLines idle high, but 0x65 is NACKed A full scan from 0x00 to 0x7F gets no ACKQuestionsAN2606 lists I2C4 on PD12/PD13. Does the bootloader use only those pins, or also other I2C4 pins such as PB8/PB9? Is BOOT0 = 1 enough on a blank device, or is STiROT involved in this boot path?Thanks.
Hi! When I run the command "vulkaninfo --summary". I get this critical error."libvulkan_VSI.so.1.3.3 contained a 1.1 or greater API version, but does not support vkEnumerateInstanceVersion, treating as a 1.0 ICD".What this means is that according to the data sheet of STM32MP2, the GPU supports Vulkan 1.3. but due to the lack of support for vkEnumerateInstanceVersion, the Vulkan support falls back to 1.0.Question: is this true that Vulkan falls back to 1.0 fue to this warning?Is there any newer version of libvulkan_VSI.so?Here is the complete output: """WARNING: [Loader Message] Code 0 : loader_scanned_icd_add: Driver /vendor/lib/libvulkan_VSI.so.1.3.3 supports Vulkan 1.3, but only supports loader interface version 2. Interface version 5 or newer required to support this version of Vulkan (Policy #LDP_DRIVER_7)WARNING: [Loader Message] Code 0 : terminator_CreateInstance: Manifest ICD for "/vendor/lib/libvulkan_VSI.so.1.3.3" contained a 1.1 or greater API version, but does not support vk
I have heard that ST have tried QtNanoBrowser on the MP257 and according to them the web browser is working well.My question is if there are any more additional information about the user experience of QtNanoBrowser on the MP257?For example a benchmark and which pages did run smoothly and which pages took long time to load.
Hello STM32 Community,I am currently working on a custom PCB designed using the STM32H7A3ZIT6Q (Cortex-M7) microcontroller. I am trying to program the MCU using an ST-LINK/V2 debugger through a Tag-Connect adapter, but STM32CubeProgrammer is unable to detect the target MCU.Hardware configuration: MCU: STM32H7A3ZIT6Q (SMPS variant) Programmer: ST-LINK/V2 Adapter: TC2050-ARM20-10 REV2 Programming cable: TC2050 PCB programming connector: TC2050-IDC-ND footprint External power supply: 3.3 V DC Target voltage reported by ST-LINK: 3.22 V Debug interface: SWD STM32CubeProgrammer settings: Port: SWD Frequency: 100 kHz Mode: Under Reset Reset Mode: Hardware Reset Access Port: 0 Speed: Reliable ST-LINK Firmware: V2J47S7 Error messages:Error: Unable to get core IDError: No STM32 target found!Troubleshooting performed: The ST-LINK/V2 is successfully detected by STM32CubeProgrammer. The programmer reports a target reference voltage of approximately 3.22 V. The PCB is
Hello ST Support,I am using the NUCLEO-H533RE board and would like to clarify whether the STM32H533 supports hardware-accelerated SHA-3, particularly SHA3-256.I noticed an inconsistency in the documentation:The product page and datasheet feature summary list “HASH (SHA-1, SHA-2, SHA-3)”. Section 3.30 — HASH hardware accelerator of datasheet DS14539 Rev 3 describes SHA-1/SHA-2 algorithms but does not mention SHA-3. I could not find a SHA-3 operating mode in RM0481, or a corresponding algorithm selector/API in the STM32CubeH5 HAL version installed in my project.Could you please confirm:Does the STM32H533RET6 physically support hardware-accelerated SHA3-256? If so, which registers, HAL APIs, and STM32CubeH5 version should be used? Is an example available?Thank you for your clarification.
Hello everyone! 👋I am new to STM32 development and recently started learning how to program STM32 microcontrollers using STM32CubeIDE. I created a simple project, but I am having trouble connecting my development board to the debugger.I am not sure whether I missed a configuration step or if there is a problem with the USB connection or debug settings. Since I am still learning, I would appreciate some guidance on how to troubleshoot this issue. 😊❓ Error / IssueWhen I try to start a debugging session, STM32CubeIDE does not seem to detect my board correctly. Sometimes the debugging process fails to start, and I am unsure what to check next. ⚠️ 🙏 My Questions Is there any additional driver I need to install? How can I check whether the ST-LINK debugger is detected correctly? Are there any beginner-friendly steps to verify the board and debug configuration? I would really appreciate any advice. I am just getting started with STM32 and would love to learn how to solve this
Wiring from st link to the stm32g061Error message It does not connect to STM32CubeProgrammer with the stm32G061 it keeps saying Error: unable to get core IDError: No STM32 target found! If your product embeds Debug Authentication, please perform a discovery using Debug Authentication. I have NRST pulled high with a 10k ohm resistor and then a tactile button which will make it go low when pressed. The pinout for the STM32G061 is the same as the STM32G050 and when I have the same wiring as I did with the STM32G050 on this st link v2, but with the stm32G050 it connected correctly in STM32CubeProgrammer. Why doesn’t it work with the STM32G061?
Our board contains a STM32H523 and a W25Q256JV connected to OctoSPI1 configured for Quad SPI mode. FileX/LevelX should handle the external memory.LevelX OSPI Component is configured for “Custom”. After generating the code with CubeMX (6.18.1), Filex/Target/lx_stm32_ospi_driver_glue.c contains several functions with wrong code, e.g: INT lx_stm32_ospi_get_status(UINT instance) {…/* Initialize the read status register command */s_command.OperationType = HAL_XSPI_OPTYPE_COMMON_CFG;s_command.IOSelect = HAL_XSPI_SELECT_IO_7_0;s_command.Instruction = LX_STM32_OSPI_OCTAL_READ_STATUS_REG_CMD;s_command.InstructionMode = HAL_XSPI_INSTRUCTION_8_LINES;s_command.InstructionWidth = HAL_XSPI_INSTRUCTION_16_BITS;s_command.Address = 0;s_command.AddressMode = HAL_XSPI_ADDRESS_8_LINES;s_command.AddressWidth = HAL_XSPI_ADDRESS_32_BITS;s_command.AlternateBytesMode = HAL_XSPI_ALT_BYTES_NONE;s_command.DataMode = HAL_XSPI_DATA_8_LINES;s_command.DataLength = 2;s_command.DummyCycles = LX_STM32_OSPI_DUMMY_CYCLES_
Hi listI am testing the STM32MP135d-odyssey for a project. It is small, still cheap, has support for POE and on board ethernet connectors and SD-card holder. The buildroot repositories are quite old so I wonder if the board is in actual use and can be recommended for new projects?The xogium repository seems very outdated but I have cherry picked a few patches from there to a fork of STMicroelectronics repository and it builds and boots with modern buildroot. I have only tested to boot from sd-card yet.Please test if interested. I have updated versions of buildroot-stm32mp135d-odyssey, u-boot and optee_os in my Github repository.https://github.com/GauiStori/buildroot-stm32mp135d-odysseyShall I make pull requests for u-boot and optee_os to STMicroelectronics or xogium? Or is there an updated version of xogium somewhere?Now I want to see if I can find a working Yocto recipe. RegardsGudjon
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