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Environment:STM32CubeMX version: 6.18.1  STM32CubeIDE version: 2.2.0 STM32 MCU: SMT32H7R3Z8J6 OS: Windows 11Project configuration:Code Generator option: "Generate peripheral and middleware initialization as a pair of .c/.h files per peripheral (optional)" = [Enabled / Disabled] Relevant peripherals already enabled before: xSPI, USART1 New peripheral added that triggers the issue: USB_FS/HS, SPIx, UART/USARTx, and others. Description:When I add a new peripheral or middleware in STM32CubeMX and generate code, CubeMX creates an empty folder or generates incomplete peripheral and/or middleware output.The issue appears repeatedly with the same pattern and is not random. In the first case: Create or open project in CubeMX. In Project Manager / Code Generator, set: "Generate peripheral initialization as a pair of .c/.h files per peripheral" = Disabled (default).  Generate code.  Add a new peripheral: USB_FS (and/or others).  Generate code again. Open CubeIDE, then build. In the current situat

Split from this post: Dear ST Technical Moderator,(mEALLEm)many thanks for your prompt answer !You actually solved my problem by using CubeMX2 tool,where one can assign selected peripheral pins (in my case COMP2 two inputs and one output)to actual package IO pins.As far as I see, CubeMX2 tool “offered” to make assignment of Comparator Plus input with one of four IO pinsCOMP2_INP:IO1: PA3IO2: PB15IO3: PC0(I want to use PA3) !and Comparator Minus input with one of four IO pinsCOMP2_INM:IO1: PC1IO2: PC5IO3: PA2(I want to use PA2) !it is stated in my text, in the very beginning !... quoteIn new design,  where planned MCU is STM32C542CCT6 device, (LQFP48 package),I plan to use internal Comparator COMP2....PA7 pin as Comparator2 Outputand pin PA2 as Comparator2 -INPut, and pin PA3 as Comparator2 +INPut.... unquoteWell, the only problem is that I did not install SW development environment yet,so, I did not use CubeMX2 tool, I was just reading the documentation, RefManual and device DS,and I d

Hi, I find the startup file generated by CubeMX2 for my STM32C551xx MCU doing something weird that I couldn’t understand. /**  * @brief  This function is the Reset Handler called on controller reset.  * @param  None  * @retval None  */__WEAK __NO_RETURN void Reset_Handler(void){  __set_PSP((uint32_t)(&__INITIAL_SP));  __set_MSPLIM((uint32_t)(&__STACK_LIMIT));  __set_PSPLIM((uint32_t)(&__STACK_LIMIT));  SystemInit();         /* CMSIS System Initialization */  __PROGRAM_START();    /* Enter PreMain (C library entry point) */}The code shown above reset the PSP pointer rather than MSP. I’m not sure if I do some misunderstanding about the stack pointer, as PM0264 indicated that MSP should be the one reset to the value retrieved by the reset handler. 

The linker file is expected to be in the root directory instead of the subdirectoryI have a project that has to compile for two STM32 hardware platforms:- the Nucleo-F446RE development board- the STM32G051 microcontrollerThe project is developed in VS Code.The .ioc file has been moved from the root directory to two subdirectories:./target/nucleo_f446re./target/g051In the file CMakePresets.json        {            "name": "nucleo_f446re",            "inherits": "default",            "cacheVariables": {                "CMAKE_BUILD_TYPE": "Debug",                "STM32_TARGET": "nucleo_f446re"            },            "toolchainFile": "${sourceDir}/targets/nucleo_f446re/cmake/gcc-arm-none-eabi.cmake"        }, The gcc-arm-none-eabi.cmake file is generated by STM32CubeMX. It contains the following line:set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -T \"${CMAKE_SOURCE_DIR}/STM32F446XX_FLASH.ld\"")This means that the linker script is expected to be in the root directory of the projec

Hi all,When I create a TouchGFX application starting from CubeMX, the following folder and its subfolders are not generated:{ProjectName}\Appli\Middlewares\ST\touchgfx_componentsGPU2D is enabled, and “Use GPU2D acceleration” is set to True under the X-CUBE-TOUCHGFX package settings.However, when I create a TouchGFX project using TouchGFX Designer and select the STM32N6570-DK, these folders are generated correctly.Am I missing a configuration step in CubeMX?Thanks so much!

The problem described in https://community.st.com/stm32-mcus-touchgfx-and-gui-33/duplicit-include-paths-are-added-to-keil-project-when-touchgfx-project-is-regenerated-151799 ist still there. The topic was closed a year ago and it seems that nothing happened since then.Please provide a solution!

According to the STM32MP257 datasheet:"1× USB 2.0/3.0 high-speed/SuperSpeed dual role data with embedded 480 Mbits/s and 5 Gbits/s PHY" "1× PCI Express with embedded 5 Gbits/s PHY (PHY shared with USB 3.0 SuperSpeed)"I would like to clarify:Can the USB3DR peripheral be used as a USB 3.0 SuperSpeed port while simultaneously supporting USB 2.0 High-Speed operation on the same connector? Is the embedded USB 2.0 PHY always available when the USB3DR interface is enabled? When PCIe is not used, can the USB3DR interface provide both the 480 Mbit/s USB 2.0 and 5 Gbit/s USB 3.0 links together as a standard USB 3.x port? Is the PHY sharing limitation only between PCIe and USB 3.0 SuperSpeed, or does it also affect USB 2.0 functionality?Any clarification on the USB/PCIe PHY sharing architecture would be appreciated.

Hello, I’m trying to initially build the Distribution-Package 6.2.0 (v26.02.18) as stated in the Wiki (https://wiki.st.com/stm32mpu/wiki/STM32MPU_Distribution_Package#Initializing_the_OpenEmbedded_build_environment)I am using a VM in Virtual Box running Ubuntu 24.04.5 LTS.I attached the log file.Any help is appreciated :)Thanks in advance.Ben

Not able to log imu(ASM330LHH) data in the sdcard tried multiple times not detecting correct imu data is null only 

Dear ST Community,I am currently testing the position control functionality using the following API: MC_ProgramPositionCommandMotor1(target, duration_s);I would like to clarify the behavior of the duration parameter. Does this parameter define only the expected movement duration, or does the position control algorithm also ensure that the motor reaches the specified target position within that duration?I am testing a case where the target position is intentionally very large: float actual = MC_GetCurrentPosition1();float commanded_target = actual + 10000;MC_ProgramPositionCommandMotor1(commanded_target, 2.0f);In this case, completing a 10000-radian movement within 2 seconds is physically unrealistic for my motor.I am monitoring the control status using the following code: uint32_t start = HAL_GetTick();printf("ms (planned %ld ms)\r\n", (long)(MC_GetMoveDuration1() * 1000));while (1){ if (HAL_GetTick() - start < 10000) { printf("Control status : %d state : %d Fault

Hello, I am currently trying to set up the STM32H745ZIT6, and the datasheet wasn’t too clear about how to wire up the 3 VCAP pins. It stated to use 2x 2.2uF caps, but doesn’t state which pins. I found an old forum with many different configurations, typing all VCAP pins together, no VCAP pins tied togehter, and only two VCAP pins tied together. I just wanted some clarification on how I should be typing these pins.

 For diode part number ESDLIN1524BJ following information is needed:1) Housing/Encapsulation material (Example HENKEL GR-646)2) CTE (Co-efficient of thermal expansion) for Housing/Encapsulation material3) Lead Frame Material (Example Alloy42)4) CTE (Co-efficient of thermal expansion) for Lead Frame Material

Hi all, hoping some of the veterans here or an ST engineer can help. Long debug session, board-level causes systematically ruled out, looking for input on what's left.Setup: SPC58NH92E7RMI0X (eLQFP176), custom board, internal-regulator-with-external-ballast configuration (BC868ballast transistor).Core symptom: VDD_HV_IO_MAIN, fed from a confirmed-clean 3.3V LDO, never reaches 3.3V once connected to the MCU — plateaus around 1.3–1.8V regardless of available current (tested to 800mA–1A limit, current settles 500mA–1.5A depending on config). VDD_LV never stabilizes at 1.2V as a direct consequence. MCU runs very hot; the ballast transistor does not.Ruled out:Wrong part (physically confirmed) Wrong pinout: every power/config/Ethernet pin checked against the official IO definition workbook Passive short on VDD_HV_IO_MAIN (~2.9kΩ unpowered, not a short, higher than an unrelated rail on the same board measured the same way) Wrong component values/orientation on the ballast circuit A real power

I am currently evaluating the following ST platform for an IO-Link Device application: MCU Board: NUCLEO-G071RB IO-Link Expansion Board: X-NUCLEO-IOD02A1 IO-Link Transceiver: L6364Q Software Package: X-CUBE-IOD02 Development Environment: STM32CubeIDE The STM32G071RB example project included in X-CUBE-IOD02 builds and runs successfully.However, based on the documentation and the provided ministack library, the current software package appears to be based on IO-Link Interface and System Specification V1.1.2.For a new product development, I would like to use a newer or the latest available IO-Link Device Stack.I would appreciate any information on the following: Is there a newer version of X-CUBE-IOD02 that supports an IO-Link specification later than V1.1.2? Is there an updated version of the following ministack library that supports a newer or latest IO-Link specification? iol_device_ministack_stm32g0_wc32_ot.a If an updated library is available, where can the corresponding li

I am facing an intermittent issue with the STM32N6570-DK when using it with macOS.Setup Board: STM32N6570-DK Host: MacBook Pro STM32CubeProgrammer: v2.23.0 Connection: USB-C hub with USB-A ports ( I am currently using the following USB hub: https://amzn.in/d/02O7R7zS) One USB-A port is connected to the STM32N6570-DK USB1 USB-C port Another USB-A port is connected to the STM32N6570-DK ST-LINK USB-C port Application: AI inference application using the onboard display and USB communication to stream data back to the host Initially, JP2 was configured on pins 1–2 (5V_STLK). IssueWhen using a direct USB-C-to-USB-C connection on Windows, I do not encounter this issue.However, on macOS, a direct USB-C-to-USB-C connection results in DEV_USB_COMM_ERR. Based on a suggestion from a related ST Community discussion (ST-LINK stuck in DEV_USB_COMM_ERR until USB replug after connecting with no target | Community),Also, we found out that a known issue/ limitation regarding this (USB

EnvironmentBoard: NUCLEO-C562RE MCU: STM32C562RET6 STM32CubeMX2: [your version] Project type: CMake Middleware: FreeRTOS configured through STM32CubeMX2ProblemWhen a FreeRTOS task is configured in STM32CubeMX2, the task creation code and task entry function are generated in:generated/middleware/freertos/mx_freertos_app.cThe official ST tutorial for using FreeRTOS with STM32CubeMX2 also shows application logic being implemented directly inside the generated task function:https://community.st.com/stm32-mcus-60/how-to-use-freertos-with-stm32cubemx2-161926However, after modifying the generated task function and running IDE Project Generation again, STM32CubeMX2 detects mx_freertos_app.c as an externally modified generated file and reports a conflict.The original file can be preserved as a backup when "Overwrite with backup" is selected, so the application code is not silently lost.However, this means that normal project regeneration requires conflict handling and potentially manual merging

Hello,I am currently developing a USB Device application using the STM32N657L0.I am reaching out to ask for advice because I am having difficulty meeting the target power consumption requirement of 5V, 2mA max during USB Suspend state. Our target conditions and system requirements are as follows:VDDCORE uses an external power supply. The USB Driver must be maintained during USB Suspend. The system must be able to wake up and recover via USB. Power consumption must remain below 5V, 2mA during USB Suspend.Currently, when the chip is configured in STOP Mode, the measured power consumption is:VDDA18AON (1.8V): ~5mA VDDCORE (0.81V): ~40mA We are looking for ways to further reduce these currents to meet the 2mA requirement.Could you please guide us on how to optimize the power modes, clock gating, or power supply configurations to achieve this? Any suggestions or reference guidelines would be greatly appreciated.Thank you for your support.Best regards,

Hi I would like to clarify the exact behaviour of the BDU function. According to the datasheet and application note, BDU should prevent the output registers from being updated until both the LSB and MSB have been read.After enabling BDU, I repeatedly read only the LSB register without reading the corresponding MSB. However, I receive a new LSB value with each read. This means LSB is getting updated, eventhough the condition of reading both LSB and MSB is not fulfilled. Why acceleration data appears to update even though the corresponding MSB register has not been read?I’m using the following notations to explain better. Time LSB MSB t1 L1 M1 t2 L2 M2 t3 L3 M3 t4 L4 M4  Could you please clarify whether the LSB is allowed to update while the MSB remains frozen? If so, when the MSB is eventually read, should it correspond to the first LSB value or to the latest LSB value? i.e. If i read LSB only 4 times and then read MSB, would it be M1 or M4?  Is the BDU behaviou

 I’ve been discovering the different views available in STM32Cube IDE and among them is the Build Analyzer view.In this view I found a section in the RAM called ._user_heap_stack.I searched for it in the linker script and found that it corresponds to the following section : /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */._user_heap_stack :{. = ALIGN(8);PROVIDE ( end = . );PROVIDE ( _end = . );. = . + _Min_Heap_Size;. = . + _Min_Stack_Size;. = ALIGN(8);} >RAMWith _Min_Heap_Size = 0x200; /* required amount of heap */_Min_Stack_Size = 0x400; /* required amount of stack */In Figure 1, one can see that the start address of the ._user_heap_stack is 0x2000 002C. This means that the last address of the stack should be 0x2000 002C + 200 + 400 = 0x2000 062C, with the 8 byte alignment that would make it 0x2000 0630. Figure 1 : Screenshot of the Build Analyzer ViewTo make sure my calculations are correct, I added a variable in the linker script (high

Hello everyone,I am experiencing an issue with the FreeRTOS Kernel Awareness view in STM32CubeIDE, specifically regarding the task runtime statistics. The plugin seems to be failing to parse or display the correct runtime percentages, showing almost all tasks permanently stuck at 1% or <1%.My Setup & Recent Changes: MCU: STM32G474 IDE: STM32CubeIDE v2.2.0 Previous RTOS: FreeRTOS V10.3.1 (Generated via STM32CubeMX with the CMSIS-RTOS v2 wrapper) Current RTOS: FreeRTOS V11.3.0 (Added manually via the ARM software pack, bypassing CubeMX generation) The Problem: I recently migrated my project to native FreeRTOS V11.3.0. I removed the old CubeMX-generated middleware and integrated the new version using the ARM pack. I also configured everything required for runtime statistics to function properly (setting configGENERATE_RUN_TIME_STATS, configuring the hardware timer via portCONFIGURE_TIMER_FOR_RUN_TIME_STATS(), and setting up portGET_RUN_TIME_COUNTER_VALUE()).While the project

Hello,I am getting a hard fault while trying to integrate TouchGFX into a Zephyr application.The application is secure-only and the screen design is very simple: it contains a single screen with one box. When I debug the application, the hard fault occurs in the touchgfx::Application constructor (so I cannot debug), which is called indirectly through:FrontendHeap& heap = FrontendHeap::getInstance();I have already tried increasing the following Zephyr configuration values (CONFIG_MAIN_STACK_SIZE and CONFIG_HEAP_MEM_POOL_SIZE).CRC is enabled. DMA2D is disabled for now — the “Use DMA2D Accelerator” option is set to No in the X-CUBE-TOUCHGFX package, to keep the setup simple and eliminate one possible source of issues.The framebuffers are aligned and placed across AXISRAM3, AXISRAM4, and AXISRAM5The setup is as custom board with:MCU: STM32N65XXZephyr version: 4.4TouchGFX version: 4.26.1Zephyr SDK: 1.0.1I would appreciate any help, suggestions, or debugging directions.Thanks in advance.

I’ve got a working graphics system.  It does high level operations on a 32 bit virtual image of the display’s resolution.   The image is then translated to a 16 bit buffer image (RGB565 for an ILI9341 display).  That image is then transferred over SPI to the display.  The SPI drivers can be polled, interrupt driven, or DMA driven.  Software drivers are used for all of this, and work.Moving to a different processor (U575 from L562), ChromART is available.  It could be used for filling the virtual image, translating to the RGB565 image.  2D DMA can be used to transfer modified blocks to the display.Now the problem.The transfer works erratically in some cases.  Some data (and I’m using mostly saturated colors) doesn’t transfer well into RGB565 (say 100% blue), it may just end up with black.  Other times, the complete color palette is transferred properly.I’m investigating whether or not the repeated restart of the ChromART peripheral is a problem.  Mostly what happens is that the mode sho

The user authentication service is under maintenance on September 17 at 6:00 a.m. CET for approximately 30 minutes. During this period, disruptions can occur. The impact is limited to versions earlier than STM32CubeMX V6.16.0 and STM32CubeIDE V2.0.0. The service returns to normal soon after maintenance is complete.What to do if a problem occursIf issues occur during the maintenance window, use st.com or try again after 30 minutes. If the problem persists after that time, contact ST through the Community for further assistance. Update September 17, 2026:The maintenance was successfully completed as scheduled on September 17.If you encounter any issues, please do not hesitate to contact us.

The user authentication service is under maintenance on September 17 at 6:00 a.m. CET for approximately 30 minutes. During this period, disruptions can occur. The impact is limited to versions earlier than STM32CubeMX V6.16.0 and STM32CubeIDE V2.0.0. The service returns to normal soon after maintenance is complete.What to do if a problem occursIf issues occur during the maintenance window, use st.com or try again after 30 minutes. If the problem persists after that time, contact ST through the Community for further assistance. Update September 17, 2026:The maintenance was successfully completed as scheduled on September 17.If you encounter any issues, please do not hesitate to contact us.

Hello everyone,I’m using Nucleo STM32N6 for a project of mine, and I used template XIP to begin with.In template XIP, clock frequency of the XSPI2 is set to 50Mhz without any prescalers, and VDDIO3 is set to 1 (1.8V). That setup works fine for XIP up to 85Mhz clock frequency, but above that at BOOT (00) it fails as soon as it tries to jump to a application. I haven’t been able to resolve this problem. Is it setup, or something with EXT_MEM middleware?In MX25 datasheet it can be seen that frequency heavily depends on dummy cycles, and 86Mhz corresponds to 8 dummy cycles, but on 200Mhz it requires 20. In EXT_MEM setup there is a 8D8D8D case where i go into during setup and it sets object to 20 dummy cycles, but I’m not sure is it successful in actually forcing that setup. Any help would be welcome.