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We have a current application in which our F7 is connected to an external Microchip PHY which provides a 50 MHz reference clock for RMII.  We are attempting to place the system into a low power mode in which we disable the PHY thus stopping the reference clock.  Is there a way to do this that will not cause the network stack on the MCU to fail?  We are using Zephyr as our RTOS which may or may not be relevant.

Did someone know the short-circuit withstand time (SCWT) or short-circuit SOA characterization for SCT040W65G3-4 under VGS = +15/-3 V, including the dependence on VDS and junction temperature? Is the value guaranteed or characterization-only?

Hello,I am having a problem connecting to an STM32F103C8T6 (Blue Pill) using an ST-LINK V2.The interesting thing is that this exact ST-LINK programmer was working correctly with both STM32CubeIDE and STM32CubeProgrammer before. I was able to program and debug the STM32 without any problems.Now, STM32CubeIDE gives me the following error when I try to start debugging: Failed to execute MI command:target remote localhost:61234cannot resolve name: The specified class was not found.I checked the Debug Configuration in CubeIDE, and the settings are:Debug probe: ST-LINK (ST-LINK GDB Server) Interface: SWD Host: localhost Port: 61234 Frequency: Auto Access Port: Cortex-M3 Autostart local GDB server: EnabledCubeIDE can detect the ST-LINK during the Scan operation, and it shows its serial number. However, when I try to debug, it says that no ST-LINK with that serial number can be found.I also installed STM32CubeProgrammer to test the connection independently. However, CubeProgrammer is also unab

Dear ST Edge AI Support Team,We are deploying a YOLO11n person-detection model on the STM32N6 NPU using the relocatable(LRUN) generation flow. While decoding the generated runtime buffer descriptors on-target, wefound that the top-level *input* user-IO buffer's channel-position metadata disagrees with itsown reported memory shape, and does not change when explicitly requesting a channel-last inputlayout.Configuration Target: STM32N6 ST Edge AI Core v4.0.1-20581 7ed50de05 Model: yolo11n_256_quant_pc_uf_od_coco-person-st.tflite (quantized, uint8 input, 256x256x3) stedgeai cli command (as echoed by network_generate_report.txt):   "stedgeai generate --model yolo11n_256_quant_pc_uf_od_coco-person-st.tflite --relocatable    split --target stm32n6 --no-inputs-allocation --no-outputs-allocation --optimization    balanced --st-neural-art user_profile@profile-neural-art.json --name network --verbosity 1    --c-api st-ai --inputs-ch-position chlast --workspace ./workspace --output ./outputs"Issue

I am working with an STM32MP257F-EV1 Evaluation Board (board reference MB1936, target device STM32MP257FAI3) and am trying to debug a standalone bare-metal application running on the Cortex-M33 core directly over SWD using ST-Link.Current SetupBoard: STM32MP257F-EV1 Board reference: MB1936 Target: STM32MP257FAI3 Tools: STM32CubeIDE and STM32CubeProgrammer Boot configuration (SW1): Development boot Boot0 = 1 Boot1 = 1 Boot2 = 0 Boot3 = 0 JP3: No jumper fitted (STLINK-V3EC active) CubeIDE Debug Configuration: Load Mode = "thru JTAG/SWD link (Engineering mode)" Access Port = "8 - Cortex-M33" Debug interface = SWD I have also attached a screenshot of the debug error I am receiving.Current ObservationI am able to debug the Cortex-M33 successfully when the board is first booted from an SD card. After the SD-card boot completes, I can connect to and debug the M33 core from CubeIDE.However, my requirement is to debug the M33 without booting the board from an SD card, eMMC, or QSPI.Specif

I flash firmware in stm32f030c8t6 MCU around 1000pcs and applied RDP level 1 protectionnow i face issue that some MCU work fine but on some application don’t run…i have read all register of both MCU good and not goodkey difference found is  below figure. all perpheral rister difference table left one not good write one goodi also observe when i connect MCU with stlink v2 in stm32cubeprogrammerGood MCU bootloader version is 0x21 show eror on reading flash memoryNOT Good MCUbootloader version is 0x23 read flash memory while RDP level 1 was active and show same pattern valuesNOT GOOD MCU GOOD MCUnow how can i solve this issue?

Hello ST Community,We are using the VIPER16LDTR in a non-isolated buck converter to generate 12VDC from a 325VDC rectified bus. The input is 230VAC from a Variac, rectified to approximately 325VDC through our input rectification stage. The circuit follows the standard buck topology from VIPER16 datasheet Figure 17. Operating conditions: Vin = 325VDC, Vout = 12V, Iout = approximately 250mA, fsw = 60kHz (VIPER16L type confirmed with differential probe).What we have verified as healthy:DRAIN pins 13-16: 325VDC present and confirmed VDD pin 5 (via C21, 10uF): 12V present — internal HV startup source working SW node pin 2: 60kHz switching waveform confirmed with differential oscilloscope probe D9 (FDLL4148): forward drop confirmed, correct orientation D10, D11 (600V/1A): both healthy in diode mode L3 (1mH, SRR1206102KL): DCR = 0.25Ω, solder joints inspected and reflowed, continuity confirmed C22 (220uF, 25V output cap): 1.4MΩ to GND — no leakage, no short 12V rail to GND (load side): 4.5kΩ

I am using three Nucleo-WL55JC1 boards running software based on the dual-core SubGHz-pingpong example in LoRa mode.The SDK I am using is STM32CubeWL Ver. 1.5.0.The settings used are BW=125 kHz and SF=10.The first board initiates the sequence, transmitting a 16-byte packet every 10 seconds and then switching to receive mode.The second board acts as a receiver and sends a response upon receiving a packet.The third board is receive-only and monitors the communication status. If the second board does not send a response, the first board transmits packet without issues.However, if the second board does send a response, the first board sometimes fails its subsequent transmission, depending on the timing of that response. If the second board responds within approximately 150 ms of receiving the packet, the first board operates correctly.If the second board responds after a longer interval, the first board may fail to transmit the next packet.Observation with a spectrum analyzer shows that th

I am integrating X-CUBE-AI and the STM32H7 Safety STL into the same STM32H743 Keil/ArmClang project.The X-CUBE-AI Keil runtime requires short enums and 16-bit wchar_t (-fshort-enums -fshort-wchar). However, the Safety STL library appears to require full-size enums and 32-bit wchar_t.Configuring the project for X-CUBE-AI causes the Safety STL library to fail linking. Configuring it for the Safety STL causes Arm linker ABI errors when linking the X-CUBE-AI runtime, including enum-size and wchar_t mismatches.Is there an officially supported compiler configuration or compatible library variant that allows X-CUBE-AI and the STM32H7 Safety STL to coexist in the same ArmClang application?

For years, ST seems to spit in the face of developers every time they try to “improve” the ecosystem. Even now they’re trying to move toward *** like AI chips or other *** that sounds great to shareholders, while we developers are left with the crumbs of their work. These chips are widely recognized around the world and probably have some of the best engineers in the industry behind them, and yet what we actually get as developers are slow programs programs with a thousand issues on Linux, badly developed no matter how you look at it.Recently, as Linux programmers, we ran into the problem that CubeProgrammer was using an “hack” I can’t call it anything else where it used an sprintf() on stdin to try to catch all files starting with 0x*. And as soon as this recursive hack stopped working, they blamed Linux for the issue (obviously). All these applications are written in Java and are ridiculously slow, to say the least. An Eclipse-based IDE in 2025 feels like a slap in the face to anyone

Hello everyone.I have recently made my own STM32 board based on the STM32F405. After soldering all the components and testing all pads and connections, finding them to be wired correctly and checking that the 3.3V is being supplied to all the correct pins, I tried to upload some code, but to my shock, the STM32F405 isn't establishing a connection via the ST-Link V2 nor the USB cable. After trying multiple fixes, I suspect the issue might be the STM32F405 chip that I got off AliExpress itself. Before taking any further steps to replace it, I decided to post a question here for review in case the problem was in my PCB design. And sure enough, I had misplaced the chip pin due to the faulty pinout diagram I used as reference.I have since fixed the chip's orientation and rechecked all pad and pin connections, as well as the 3.3V supply, and found everything to be correct; yet I still cannot get the STM32 CubeProgrammer or IDE to connect with my board using the ST-Link V2 or a

Hi all - I have a problem getting DMA working with SPI, for communication with an MCP3564R ADC as one task in a complex project running on FreeRTOS. I have made a stripped-down version of the project that just does the ADC reading task. It runs on a bare Nucleo board and illustrates the basic problem which shows up from the first transmit, so a connected ADC isn’t needed to see the problem.The code uses SPI3 at 20MHz (although the problem occurs at lower speeds as well)The GPIO pins I’m using are not the defaults:GPDMA1 is configured with two channels for SPI3 TX and RX:My code can be configured to use the HAL SPI DMA APIs or the interrupt APIs like so:static uint8_t write_register(const uint8_t * reg_write_cmd_p, uint8_t num_bytes){ HAL_StatusTypeDef hal_status; BaseType_t wait_ret_val; uint32_t notify_bits; uint8_t ret_val = 0; /* Failure */#if (MCP3564_HAL_SPI_MODE == MCP3564_USE_HAL_SPI_DMA_MODE) hal_status = HAL_SPI_Transmit_DMA(&ADC_SPI_PERIPH_HANDLE, reg_write

hi I am trying to get an sd card to work with my custom board, uses STM32F412RET6.when i try to mount or do anything other than init in 1 bit mode the code gets stuck at this point. I have been able to read block size and number from the SD card but that is it. while(!__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_RXOVERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT)) { if(__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_RXDAVL)) { *(tempscr + index) = SDIO_ReadFIFO(hsd->Instance); index++; } else if(!__HAL_SD_GET_FLAG(hsd, SDIO_FLAG_RXACT)) { break; } if((HAL_GetTick() - tickstart) >= SDMMC_SWDATATIMEOUT) { return HAL_SD_ERROR_TIMEOUT; } } 

STM32MP257F-EV1: SPI3 Slave Mode — NSS Pin (PB1) Fails to Claim Despite Correct ConfigurationSummaryOn the STM32MP257F-EV1 evaluation board, configuring SPI3 in slave mode (spi-slave;) works correctly for the SCK, MOSI, and MISO signals, but the NSS (chip select) pin — PB1, using the documented-correct AF1 alternate function — silently fails to be claimed by the pin controller. No error or warning is logged anywhere. All three other SPI3 pins on the same bus, using the same AF1 value, claim successfully.HardwareBoard: STM32MP257F-EV1 (MB1936) MPU: STM32MP257FAI3 OpenSTLinux version: 5.0.15-openstlinux-6.6-yocto-scarthgap-mpu-v26.02.18 Kernel: Linux 6.6.116-stm32mp-r3What we are trying to doConfigure SPI3 as an SPI slave (spi-slave; device tree property) so the STM32MP2 can receive data from an external SPI master over the same bus/pins already used for a sensor (previously configured as SPI master).Configuration usedCustom pinctrl group (added to stm32mp25-pinctrl.dtsi):spi3_slave_pins

The following repository contains examples for creating 'normal' type of external loaders, i.e., to be used with the "-el" argument of the STM32CubeProgrammer (e.g., with output "STM32CubeProgrammer/bin/ExternalLoader/MX66UW1G45G_STM32H7S78-DK.stldr"):https://github.com/STMicroelectronics/stm32-external-loader Where can the source code examples be found for the 'SFIx' type of external loaders, i.e., to be used with the "-elbl" argument of the STM32CubeProgrammer (e.g., with output "STM32CubeProgrammer/bin/ExternalLoader/MX66UW1G45G_STM32H7S78-DK-SFIx.stldr")?

Hi everyone,I am working on the STM32MP257-EVAL board, where my Cortex-M33 application requires both FreeRTOS and OpenAMP middleware to run together.After referring to the STM32CubeMPU packages, I found separate example projects:One for FreeRTOSOne for OpenAMP (running in bare-metal environment)I tried combining both examples into a single application. The FreeRTOS part is working correctly, but OpenAMP hangs during initialization.After debugging, I noticed that libmetal is getting compiled for the generic platform instead of the FreeRTOS platform. To address this, I changed the toolchain configuration from:-DCMAKE_TOOLCHAIN_FILE=cmake/platforms/stm32mp-generic-gcc.cmaketo:-DCMAKE_TOOLCHAIN_FILE=cmake/platforms/stm32mp-freertos-gcc.cmakeHowever, this results in multiple compilation errors. It seems the provided libmetal port may not be fully compatible with the FreeRTOS platform setup.Has anyone successfully integrated FreeRTOS + OpenAMP together on STM32MP257 (M33 core)?Are there any

SummaryOn an STM32WL5MOC-based LoRaWAN end node, we've measured a consistent ~100 ppm RTC drift on the module's integrated LSE (32.768 kHz) crystal — noticeably outside the commonly quoted ~±20 ppm room-temperature tolerance. We isolated this down to the RTC hardware itself through several independent tests before concluding it's a genuine crystal characteristic (or specific to this device/batch) rather than a software or configuration issue. Posting to ask whether ~100 ppm is within expected variance for this SiP's integrated crystal, or worth escalating further.ConfigurationMCU: STM32WL5MOC (Cortex-M4 side) RTC: RTC_BINARY_MIX mode, PREDIV_A=31, PREDIV_S=1023 (10-bit synchronous prescaler) RTC clock source: LSE — confirmed selected and ready (RCC_FLAG_LSERDY, __HAL_RCC_GET_RTC_SOURCE()) before proceeding; HAL_RTC_MspInit() itself calls Error_Handler() if LSE isn't ready/selected, so normal boot already implies this passed. Application: LoRaWAN Class A end node (US915), periodic uplin

I was testing stm32 adc interrupts but the IRQ is not working properly and idk what is the matter, I wasted a lot of time in debufgging it but didn’t get any leads. Please help me out, here is the link of the project:GitHub Repo

Hi STM32 Community,I am currently selecting an STM32 MCU for a timing-control application and would like some guidance on the required timer architecture.My requirement is:Input trigger: 45 Hz, 50% duty-cycle signal. After receiving the trigger, the STM32 should generate 8 PWM outputs with a configurable delay. The required trigger-to-output delay is approximately 0–3 µs. PWM1–PWM4: 45 Hz, 25% duty cycle PWM5–PWM8: 45 Hz, 25% duty cycle The 8 outputs need to be synchronized according to the timing sequence shown in the attached diagram. In addition, I receive 4 feedback PWM inputs: Feedback 1–4: 45 Hz, 25% duty cycle These feedback signals need to be measured/captured by the STM32. My main question is:What is the recommended STM32 timer architecture for this requirement?Specifically:How many timer peripherals would I need? Can I use two timers with 4 PWM channels each to generate the 8 PWM outputs? Can a third timer with 4 input-capture channels be used to measure the 4 feedback PWM s

I have loaded the pack for CMSIS and CMSIS-DSP using the Pack Manager in STM32CUBEMX2. However, when generating code in the Project Settings, the CMSIS appears  in the Packs Section and is generated in my project directory but the CMSIS-DSP does not appear in the Packs Section and is not generated. I want to use the DSP features but not able to. Any advice?

Hello ST Community,am working with a Nucleo-H753ZI board where the STM32H753ZI is configured as an SPI1 slave, and the SPI master is a TI AM64x R5F core.The goal is for the STM32 to continuously transmit 4-byte frames over SPI (using DMA) whenever the master clocks the bus.However, the problem is:The master is receives only FF FF/* USER CODE BEGIN Header */ /** ****************************************************************************** * @file : main.c * @brief : Main program body ****************************************************************************** * @attention * * Copyright (c) 2025 STMicroelectronics. * All rights reserved. * * This software is licensed under terms that can be found in the LICENSE file * in the root directory of this software component. * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ /* USER CODE END Header */ /* Includes --------------

Hello everyone,I am currently developing with the STM32N6570-DK and utilizing the hardware ISP. I am facing an issue with the embedded Auto Exposure (AE) algorithm's convergence time. It currently takes about 20-30 frames (~1 second) for the AE to settle on the correct exposure and gain. For my application, it is critical that the very first frame upon wake-up is perfectly exposed, meaning a 1-second delay is not acceptable.To bypass this feedback loop, I have integrated a Texas Instruments OPT3001 Ambient Light Sensor (I2C) to implement a feed-forward solution. My intended sequence is: Read the absolute ambient lux from the OPT3001 on boot. Map this lux value to a pre-calibrated Lookup Table (LUT) to determine the ideal Exposure Time and Sensor Gain. Force the STM32 ISP into manual exposure mode and inject these values directly. Start the camera stream to achieve a zero-delay, perfectly exposed first frame. I have a few questions regarding the best way to implement this within t

I have used the 70STM32H7 template in TouchGFX Designer 4.26.1 to create a project for a Riverdi RVT70 board.I've created a basic start screen, generated code and built it using CubeIDE 2.1.0.The code loads onto the target and runs as expected.If I open the project's .ioc file, I am told that the project uses V1.12.1 of the STM32Cube FW_H7 and V.13.0 is available. Upgrading to this version, saving and regenerating the code results in the project failing to build:In file included from ../../../CM7/USB_HOST/Target/usbh_conf.h:98, from ../../../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_core.h:27, from ../../../Middlewares/ST/STM32_USB_Host_Library/Class/MSC/Inc/usbh_msc_bot.h:28, from C:/TouchGFXProjects/GFX/Middlewares/ST/STM32_USB_Host_Library/Class/MSC/Src/usbh_msc_bot.c:27: ../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os.h:32:10: fatal error: cmsis_os2.h: No such file or directory 32 | #include "cmsis_os2.h"This can be fixed by adding a new i

HiI designed a PCB with an STM32MP157 using a Micron LPDDR3 memory. When I started the layout, I was advised that the memory would be available at least until 2029, so proceeded in good faith. When I came to order prototype samples back in March, I found that there was a Last Time Buy of August 31st this year.The only option that I had was to change the layout to support DDR3L memory, however with the current DRAM supply crisis, I do not have confidence that this generation of device will have sufficient longevity of supply to justify the investment in mass production.My alternative is to jump to an STM32MP2-based board and use DDR4 or LPDDR4 memory which will likely be available for longer but again with the current supply chain situation, these generations could also be obsoleted sooner than anticipated. I already read of DDR5 and LPDDR6 memories coming on stream.Two questions:With regard to the STM32MP1 and STM32MP2 processors, what is ST’s best guidance about which DRAM memory type

I have used some time to figure out to use the ADCs for a couple of Nucleo STM32G4xx boards. In particular I liked to be able to make use of the asynchronous clock. I found out by some trials and errors to get the right RCC settings for that.In RM0440 you got a ADC clock schematic figure 83 page 597. I have tried to enlarge this schematic a bit regarding the RCC controls like this: Can you agree to this schematic?These functions can help configure RCC for the other ADC clock input:__HAL_RCC_ADC12_CLK_ENABLE()         Enables clock to AHB interface__HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_ADCCLK); Enables clock to PLLPI did not find a function outside the big HAL RCC init data structure to set the bits ABCxxSEL[1:0] of RCC_CCIPR, so I did that bare metal.