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EnvironmentMCU: STM32H573 (custom board) STM32CubeProgrammer & STM32 Trusted Package Creator: v2.23.0 (same version) X-CUBE-RSSe: installed (RSSe SFI binary v3.1.0, RSS v2.2.0) License: ST HSM (hsm=1, slot=1) Boot: custom OEM bootloader (OEM-iRoT), not STiRoT / not mcuboot Connection: HotplugWhat I'm doing I'm evaluating SFI without Secure Manager, installing my own firmware into internal secure flash. TrustZone is enabled (TZEN=0xB4), and my final option bytes (CSV) set:BOOT_UBE = 0xB4 (OEM-iRoT) SECBOOTADD = 0xC0000 (0x0C000000) SECWM1 = 0x00–0x7F, SECWM2 = 0x00–0x7F (all secure)Memory layout (secure alias 0x0C000000):File Address Size 1.bin 0x0C000000 22.2 KB 2.bin  0x0C008000 ~813 KB total 3.bin 0x0C0F7FA0 80 B 4.bin 0x0C0F8000 32 B 5.bin 0x0C1F8000 5.6 KB Behavior The SFI process starts correctly:License processed OK Image header processed OK Area 1 (type H) processed OK Fails at Area 2 with:Error: Execution of RSS CMD failed, returned value = 0xF

New question split from this post.One additinal request: When checking if bootloader pin configuration has an impact on the real application it would be helpful to know the default level for output pins, likedoes the UART_TX pin drive active high or low?does the boot loader drive the SPI MISO output pin HI, LO or Z?is the CAN_TX pin drven HI or LOW?Thank you!

Dear we working on safety critical application on railway. We are going to workout a FMECA analysis on our solution and I need further documentation on the STM32WLE5. At the begininning of the project we already signed an NDA with STM to get safety plan for another STM MCU. May we talk directly than I will send you a copy of the NDA ? Thanks a lot  

In official schematic MB1248 Rev-04 on SDRAM page:SDNE Connected to MCU pin PH6,SDNWE to PH5,SDCKE to PH7,When I create prject using TouchGFX template and open .ioc file in CubeMX or open SDRAM driver in CubeIDE the pins are connected as follows:SDNE to PB6SDNWE to PC0SDCKE to PB5My question is which is correct: Schematic or Code/.ioc file? 

Hello Every One,Hardware / Software EnvironmentBoard: STM32MP257F-EV1Device: STM32MP257FAIxIDE: STM32CubeIDE v2.0.0 (Windows)Firmware package: STM32Cube FW_MP2 v1.2.0OpenSTLinux version: openstlinux-6.6-yocto-scarthgap-mpu-v25.06.11What I DidFlashed OpenSTLinux image to eMMC using USB DFU with:FlashLayout_emmc_stm32mp257f-ev1-ca35tdcid-ostl-optee.tsvFlashing completed successfully.Linux boots correctly and I can log in via UART:root@stm32mp2:~#Created a simple GPIO project for Cortex-M33 using STM32CubeMX and STM32CubeIDE:Selected MCU: STM32MP257FAIx (not board)Selected “M33 Master”Toolchain: STM32CubeIDEProject builds successfully without errorsLinker Memory ConfigurationThe generated linker script places CM33 firmware in DDR memory:NS_VECTOR_TBL : ORIGIN = 0x80100000FLASH : ORIGIN = 0x80100600RAM : ORIGIN = 0x80A00000VIRTIO_SHMEM : ORIGIN = 0x812F8000IPC_SHMEM_1 : ORIGIN = 0x81200000So the CM33 firmware is located in DDR (0x80xxxxxx region).ProblemWhen attempting to debug or download

Dear ST-Community,I was able to run QNX8 on stm32mp257f-dk (see it here: https://github.com/KozhinovAlexander/qnx8-bsp-stm32mp257f-dk)I have following boot-stage setup:#Opt Id Name Type IP Offset Binary- 0x01 fsbl-boot Binary none 0x0 arm-trusted-firmware/tf-a-stm32mp257f-dk-opteemin-programmer-usb.stm32- 0x02 fip-ddr FIP none 0x0 fip/fip-stm32mp257f-dk-ddr-opteemin-programmer-usb.bin- 0x03 fip-boot FIP none 0x0 fip/fip-stm32mp257f-dk-opteemin-programmer-usb.binP 0x04 fsbla1 Binary mmc0 0x00004400 arm-trusted-firmware/tf-a-stm32mp257f-dk-opteemin-sdcard.stm32P 0x05 fsbla2 Binary mmc0 0x00044400 arm-trusted-firmware/tf-a-stm32mp257f-dk-opteemin-sdcard.stm32PD 0x06 metadata1 FWU_MDATA mmc0 0x00084400 arm-trusted-firmware/metadata.binPD 0x07 metadata2 FWU_MDATA mmc0 0x000C4400 arm-trusted-firmware/metadata.binP 0x08 fip-a FIP mmc0 0x00104400 fip/fip-stm32mp257f-dk-opteemin-sdcard.binPED 0x09 fip-b FIP mmc0 0x00504400 nonePED 0x0A u-boot-env ENV mmc0 0x00904400 noneP 0x10 bootfs System mmc

Hello,I have generated a project with STM32CubeMX2 for NUCLEO-C5A3ZG. Now I made changes to the MX project and try to generate the project again. But during the generation a list pops up, that asks for overwrite approval. I can not interact with the list properly. (I can’t scroll and pressing ENTER does nothing)Is this a known error or is there a workaround?

 Hi,I am working with the STM32MP257F-EV1 board and would like to debug the Cortex-M33 core using the debugger using ST-LINK.Currently, I am unable to debug the Cortex-M33 core directly and I receive an error during the debug connection. I have attached a screenshot of the debug error for reference.I noticed the following behavior: If I boot the Cortex-A35 core from the SD card and allow Linux to complete its boot process, I can then successfully debug the Cortex-M33 core. However, if I do not boot Linux on the A35 core, I am unable to connect to/debug the M33 core. I would like to know whether the Cortex-M33 on the STM32MP257F-EV1 can be debugged standalone, without booting the Cortex-A35/Linux, similar to debugging the Cortex-M4/M7 on a conventional STM32 MCU such as the STM32H745XI-DISCO.Specifically: Is booting Linux on the Cortex-A35 mandatory before the Cortex-M33 can be debugged? Is there a way to debug the Cortex-M33 standalone immediately after reset/power-up, without boot

Hello,I am using:Motor Control Workbench/X-CUBE-MCSDK 6.4.1 STM32G474RETx, 170 MHz EVLDRIVE102BH FOC with three-shunt current sensing A2212 13T, seven pole pairs I cannot find the High-Speed Observer, HSO, option in Motor Control Workbench.HSO is not visible or selectable in Motor Control Workbench. The same result occurs with a one-pole-pair, 24 krpm HKP Y0H0-A11 motor. Could you confirm:Is HSO publicly available in MCSDK 6.4.1? Is EVLDRIVE102BH supported? Which reference board should be selected? Is a particular MCU, motor type, sensing topology, or project type required? Is there a working HSO example project that I can import and run? Where exactly should HSO appear in the Workbench user interface?

Hi all,I have this kit but I don’t have any bolts holding the display PCB to the main PCB. I tried to look at the BOM for a reference to the part number but I don’t see anything for the bolts. I took one of the bolts holding the standoffs to the main PCB and it looks like an M4mm x 0.5 but I rather be sure before I order a few online. I have enough stuff that doesn’t match them and I rather not add more :-).Thanks

hi We are using the STM32F103CBT6 as the ST-Link controller in our new gateway board.In the first version of the board, the ST-Link did not work as expected. We have made some changes, and this is the second version of the board.Could you please review the ST-Link schematic section and let us know if there are any issues or recommended changes? Your feedback would be very helpful in ensuring that the ST-Link works correctly in this version.Thank you in advance for your support.

Hi Team,good day,may we seek your expertise regarding these two PNs.L9369-TR and L9369S-TR.Does the "S" suffix indicate a newer, improved model?What specific design changes have been made?Is there any official documentation from the manufacturer for S?thank you very much.

Hello,We're integrating STM32CubeMX2 1.1.1 into a Linux-based development workflow (a VS Code DevContainer running Ubuntu 24.04) for STM32C5xx projects, and have run into two separate blocking issues: the installer has no silent/unattended mode, and once installed, the GUI crashes on startup and never shows a window. Details and everything we've already tried below, in case it saves time on your end.======================================================================ISSUE 1 — No silent/unattended install path on LinuxWe need to provision STM32CubeMX2 as part of an automated container image build (no interactive session available at build time). We could not find any way to do this:- Your own docs (STM32CubeMX2 1.0.0 install page) only document the interactive GUI wizard for Linux: chmod +x the installer, run it, click through Welcome -> Configuration -> License -> Installation.- We tried every CLI flag we could think of or find, including patterns used by OTHER ST installers

Hi,I am configuring the STM32L412KB to operate as an SPI1 slave in 3-wire (1-line / half-duplex) mode.I have configured the following pins:PA4 → SPI1_NSS PA5 → SPI1_SCK PA6 → SPI1_MISO / SDIOWith this configuration, the SPI communication works correctly.However, in a previous support case with ST, I was advised to use PA7 as the SDIO pin. The information I received was:“On SPI1, the single data line in 1-LINE (half-duplex) mode is the MOSI pin = PA7.”According to the STM32L412KB datasheet, PA7 is indeed the SPI1_MOSI alternate-function pin, while PA6 is SPI1_MISO.However, when I configure PA7 as the SDIO line, the communication does not work. It works correctly only when I use PA6 as the SDIO line.Could someone clarify this behavior?In particular, I would like to understand whether, in SPI1 slave + 1-line (half-duplex) mode, the bidirectional data line is actually expected to be connected to PA7 (MOSI), or whether PA6 (MISO) can/should be used in slave mode.If there are any specific SP

From the documentation it sounds like the STM32WB vectors to the reset hander when it exits STANDBY and lower power modes, correct? 

I encountered a potential bug in CubeMXs Configuration Checks for USBX.I am trying to configure USBX in standalone mode. When i try to increase the value of “USBX System Stack Size” to be higher than 1024 i get a warning that it needs to be lower than the USBX memory pool size, even when this is the case.Attached is a screenshot with example settings. To reproduce the error set USBX System Stack Size to 1025.The used MCU is a STM32U385CGTxBest regards, Cecil  

Good afternoon,We are working with STM32H7A3 boards and are currently migrating our build and flashing toolchain from STM32CubeIDE 1.9.0 to 2.2.0. During the migration we ran into a flash programming failure that we have traced to the device description, and we would like your confirmation before we adopt a workaround.WHAT WE OBSERVEProgramming at 0x08100000 is rejected with "Operation exceeds memory limits" under 2.2.0. The same operation succeeded under 1.9.0.Investigating this led to two findings on Device ID 0x480:STM32_Prog_DB_0x480.xml declares the Bank 2 base address for the 1 MB configuration as 0x08080000, which contradicts RM0455 Rev 13, Table 15, and consequently excludes the documented Bank 2 base at 0x08100000 from the valid range; Writes to 0x08080000 are accepted and verify successfully on our samples, despite Table 15 listing that range as not mapped.FINDING 1 - DEVICE DESCRIPTION FILEThe file defines two configurations for Device ID 0x480, corresponding to the 2 MB and

Hi,I’m trying to configure Cube MX to drive this display - https://www.dxqdisplay.com/product/1-75-inch-466466-round-amoled-display-oncell-touch-qspi-interface-700-nits-31-pins-co5300-driver-ic-for-smart-watch/, from an STM32U5G9VJT6Q.Are there any examples for DSI displays on the STM32U5xx series MCUs that can be referenced as a good starting point? 

Hi everyone,I'm currently working on a project using an STM32H533RET6, and I am running a bit short on available pins. I am considering reconfiguring PA13 (SWDIO) and PA14 (SWCLK) to use them as standard general-purpose I/Os for my application.My main concern is about the flashing process. If I reconfigure these pins as regular GPIOs in my firmware, the SWD interface will be disabled as soon as the code starts executing.My questions are: Is it generally possible to use PA13 and PA14 as regular GPIOs and still be able to flash new firmware onto the MCU? If yes, what is the best practice to avoid permanently locking myself out? Do I strictly need to connect the hardware NRST pin to my programmer (ST-LINK) and use "Connect under reset"? Are there any software tricks (like adding a delay before GPIO initialization) that you would recommend? Obviously, I know that live debugging won't be possible once the pins are remapped, but I just need to make sure I can still update the flash relia

Hello,As indicate in the title I am trying to supply the MCU STM32L053R8 at 1.8V on the devkit NUCLEO-L053R8.To do it I opened Jumper JP6, which purposes is to monitor current, and I deliver 1.8V on the VDD signal.But the MCU is not working when I do that, my power supply is able to show me consumption and it stays to 0. I need to level up at minimum 2.8V to see some current consumption.Is there anything in particular  I need to disconnect to be able to power it at 1.8V ? I’ve tried to open SB21 to disconnect the Green Led connected to the MCU but it did not change anything. Also, I’ve try every power range and using MSI RC as SYSCLK.Please found attached my firmware which is, basicaly, only a while(1). Best RegardsThibaud

I am struggling to get TouchGFX running on my custom board. The processor is the STM32H7A3RGT and I am driving a 320 pixel x 960 pixel LCD display. I have allocated a frame buffer in internal RAM and have LTDC producing PCLK, DE, VSYNC and HSYNC. I have configured my firmware using CubeMX to use FreeRTOS. I added a call to MX_TouchGFX_Process in my default task but it gets stuck on an assert. Specifically here:Call StackThe reason it gets stuck is because pxQueue->ixItemSize is not zero !ASSERT in xQueueSemaphoreTakeWhat am I missing ?Andy

STM32CubeMXIs there any way to adjust the size of the text in the left-hand pane?  and maybe the top right as well?  The ad is certainly large enough!Thanks!

My MCU is H7R7, the image type in touchgfx designer only have RGB565 and ARGB8888, no L8 type.Framework features can not be changed.What is wrong with that?

Hello,I followed your reference and completed all the steps you mentioned before the screenshots. How to display an image stored in external flash on the STM32H7S78-DK using the LTDC controller  However, I have two issues:Could you please provide a clear, high-resolution screenshot of Tools → Memory Management? The previous screenshot was not clear enough for me to read the settings. I am unable to flash the Appli project onto my STM32H7S78-DK.   This is what I did:Initially, I cleaned both the Boot and Appli projects. I built only the Boot project and flashed it onto the STM32H7S78-DK successfully. Then, I built the Appli project. When I try to flash the Appli project, I am unable to flash it onto the board. Could you please explain step by step how I should flash both the Boot and Appli projects on the STM32H7S78-DK?Could you please provide a clear, high-resolution screenshot of Tools → Memory Management?

I am attempting to use the Nucleo-H723ZG with Ethernet and LWIP but without FreeRTOS.I am currently using STM32CubeMX 6.18.0 and STM32CubeIDE 2.2.0.I have spent weeks attempting to get this working following the various youtube videos and topics on here.I am currently attempting a simple UDP message that can be viewed on wireshark along the lines o “H723ZG with an incrementing counter”. I am unable to get any ARP or UDP currently.Any help is greatly appreciated - thanks.