Failed to connect to the SWD interface via STLINK V3

[Second]

When we use the STLINK V3 to connect to the SWD interface of the STM32H563, it keeps showing “target not found”. We tested the waveforms output by the STLINK V3 and found that some SWDIO rising edges almost coincide with the SWCLK rising edges, so even a slight change in the external wiring causes the connection to fail. We suspect that the wiring affects the position of the signal rising edges, leading to sampling errors on SWCLK. Is it possible to adjust the timing of the STLINK V3 so that the time interval between the SWDIO and SWCLK rising edges is widened as much as possible, thereby increasing the system margin?

Our STLINK V3 firmware version is V3J17xxxx.

[TDK]

It is not possible and not necessary to adjust relative timing of SWDIO and SWCLK. You can try a lower frequency, but it’s likely the problem is somewhere else.

[Second]

I have tried a lower frequency but still cannot connect. From the waveform, the clock period becomes longer, but the distance between the rising edges of the two signals does not change；Yellow：SWCLK；Blue：SWDIO；