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Although the data sheet specifies a field of view of either 27 degrees or 36 degrees (depending on where about it is mention in the data sheet, I have found the effective FOV to be aound 8 degrees. Setup as follows  sensor.setDistanceMode(VL53L1X::Medium); sensor.setMeasurementTimingBudget(33000);  sensor.setROISize(16, 16); startcontnuous(100);with all other sensor settings at defaultA large all black target set up at 140 cm from the sensor, reulted in a invalid reading. I then moved a white target in from one side until a valid reading was made, marked the position and repeated this for the other side top and bottom.This resulted in an area in the middle of about 20 x 25 cm which represents a FOV of around 8 degrees. Any target outside this selected area will reults in an invalid reading (i..e canot be trusted). Targets with in ths area will be detected although the accuracy is very dependent on the refectivity of the oblect, the variation between measured and actual by as much as 30

Hi,We found an issue in VL53L4CD_CalibrateXtalk() (ULD v2.2.2, as shipped in X-CUBE-TOF1 v3.4.3).When the measured average distance is slightly greater than the target distance, the computed crosstalk is negative:ctmp_xtalk = (float_t)1.0 - (AvgDistance/TargetDistance);tmp_xtalk *= (AverageSignal/AverageSpadNb);The function only checks the upper bound (tmp_xtalk > 127.0). It then casts the negative float to uint16_t, which is undefined behavior in C. On our platform the value wraps. For example, −3 kcps is returned as 65533 and reported as a successful calibration, and the register is written with 64000, which corresponds to about 125 kcps.With that value applied, crosstalk compensation removes nearly the entire return signal: 125 kcps/SPAD × 77 SPADs ≈ 9,600 kcps, against a raw signal of about 9,700 kcps. Every subsequent measurement fails with "signal below threshold" (range_status 2, distance 8191 mm).Setup: offset calibrated at 100 mm, then crosstalk calibration on a white targe

i have a problem that has bugged me for a while now. Im using a stm32f4 microcontoler to read data from stpm34 microchip, but i can not establish a spi connection betwen them. With my logic analyzer i can see that i send mosi, the clock works and i believe the enable , chipselect and syn all work as they should. But on miso i get 0xffffffff or 0x808080 or 0xffcffeff... changing randomly. I dont know what is causing the problem. Im designing my own pcb but for now im powering the chip via arduino, and i am using stm32f4 discovery(arduino, becase the discovery has only 3v) gnd connected ofcoirse.Is it soldered wrong? Are the pads on the bottom not connected? Is the code not ok?.... any help will be welcomed and thank you in advance. Code: /* USER CODE BEGIN Header */ /** @file : main.c @brief : Main program body @attention STM32F4 + STPM34 SPI FIXED VERSION */ /* USER CODE END Header */ /* Includes ------------------------------------------------------------------*/ #include "main.h" /

Hello everyone,I am working on Ethernet communication using the STM32H750B-DK with STM32CubeIDE and LwIP. I am using the onboard LAN8742 Ethernet PHY and a direct Ethernet connection between the PC and the board. LwIP is configured with NO_SYS = 1, and I am continuously calling MX_LWIP_Process() in the main loop. When I check the Ethernet traffic in Wireshark, the PC continuously sends ARP requests asking for the STM32 MAC address, but the STM32 does not send an ARP reply. While debugging the gnetif structure, I see PHYLinkState = 0, speed = 0, and duplex = 0. I also checked the STM32H750B-DK documentation and found that the onboard Ethernet PHY is connected through MII. My CubeMX project was initially configured for RMII, so I changed the Ethernet configuration to MII. I am also checking the Ethernet DMA/LwIP memory configuration and moved the Ethernet descriptor and RX buffer sections to D2 SRAM using the linker script. However, I still cannot get a ping response from the board.Curre

I tried to create a project based on an existing STM32CubeC5 example and build it from command line.I am working on Linux and had the same issue on Ubuntu and Fedora.I opened CubeMX2 (Version: 1.1.1) and selected the “freertos_low_power.ioc2” under “STM32CubeC5/examples/middleware/freertos/low_power/NUCLEO-C562RE”, saved it to my new project folder as recommend via “save as” and tried to generate the CMake project.Direct at generation start I got the error message shown below, but a “good looking” project folder was still generated.Project extraction failed:=========================================================Example Path: /home/lecd/devel/STM32CubeC5/examples/middleware/freertos/low_power/NUCLEO-C562RE/freertos_low_power.ioc2Project Name: low_powerBoard Name: NUCLEO-C562REFormat: CMakeProject Directory: /home/lecd/devel/stm32c5_demoSW Pack Root: /home/lecd/devel/STM32CubeC5Extract STM32CubeMX2 project with the selected format: falseCopy Only Dependencies: trueExact Match Project N

Hello,I am trying the FOTA example project (ST67W611M1 Wi-Fi® – FOTA Project - stm32mcu) on a custom board. I use the provided python script to start an http server and get the binaries. While the connection with the server seems ok and the driver actually manages to read the JSON file and print the correct info, when it tries to get the STM32 binary there is an SPI timeout when parsing the response header of the http “GET” request. I can see that the server receives the request and is trying to send back the response headers. Even if I adapt the SPI timeout, there is an error at a higher level saying “Pull data from socket failed”.Since the SPI communication seems to work in general (initialization and download of JSON works), any hints why there is a timeout later on? 

We are experiencing failures on some of the STUSB4500 IC chips on production boards and from what we can tell, this is due to the power output (VBUS) being shorted to ground. We observed the STUSB4500 chip failing to negotiate PD, and the 1V2 and 2V7 LDO rails are all at 0VDC. This failure also happens on the EVAL-SCS001V1. When we replace the STUSB4500 IC, with a new one, the problem is resolved, which indicates there is no damage to any other component. This issue may be created with an off-the-shelf EVAL-SCS001V1 PCB connected to a 20V/3A source and shorting the output terminals. The datasheet claims to have short-circuit protection, but it seems to not have this. Our design already has output voltage clamping, ESD protection on VBUS, RPP, UVLO, and OVP, and the correct 1uF decoupling caps on the 1V2 and 2V7 rails, which is more protection than the EVAL-SCS001V1 has. What are some design implementations we can make to prevent this?

I’m having an issue where I get no output when trying to do PWM with DMA using Timer 3, Channel 1 on an STM32F401RET6.I am using PB4 for my Timer 3, Channel 1 pin.Regular PWM output works perfectly on this channel and pin.But if I try and do DMA transfers, there is no PWM output (voltage stays at 0).I’ve confirmed that I can do PWM DMA on another timer, Timer 2 Channel 1; this works perfectly. But when I switch to Timer 3, Channel 1, there is no output.My timer setup:/* TIM2 init function */void MX_TIM2_Init(void){ /* USER CODE BEGIN TIM2_Init 0 */ /* USER CODE END TIM2_Init 0 */ TIM_ClockConfigTypeDef sClockSourceConfig = {0}; TIM_MasterConfigTypeDef sMasterConfig = {0}; TIM_OC_InitTypeDef sConfigOC = {0}; /* USER CODE BEGIN TIM2_Init 1 */ /* USER CODE END TIM2_Init 1 */ htim2.Instance = TIM2; htim2.Init.Prescaler = 0; htim2.Init.CounterMode = TIM_COUNTERMODE_UP; htim2.Init.Period = 90-1; htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; htim2.Init.AutoReloadPreload = TI

Hello,I am currently evaluating the STM32 G4 platform for motor control. I would like to control 3 motors with one MCU, and I was planning to order: 1 * B-G473E-ZEST1S3 * STEVAL-LVLP011 * B-ZEST-ADAPT13 motorsI have installed x-cube-mcsdk-6.4.2 and tried to create this setup, but I cannot see how to add 3 motors, and how to interface many power boards to 1 control board : The file supporting B-ZEST-ADAPT1 needs to be imported ?The support for 3 instead of 2 motors needs to be done manually (by editing the code) ?The 3 motors will be using biss or ssi so I will have to create those drivers. Are there any other points to check for compatibility ?Thanks for your support

Hello,its the first time for me trying to use the X-CUBE-SBSFU. So I downloaded the latest version (V2.8.0) and updated to the STM32CubeIDE V2.2.0 to be up to date.But the SECoreBin Project is not compiling. I get the error message:C:/Program Files/ST/STM32CubeIDE_2.2.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/bin/ld.exe: ./Application/Startup/se_key.o(SE_ReadKey_1): Unknown destination type (ARM/Thumb) in ./Application/User/se_crypto_bootloader.o./Application/User/se_crypto_bootloader.o: in function `SE_CRYPTO_AES_ReadKey':C:/Users/……./Application/ThirdParty/ST/STM32CubeExpansion_SBSFU_V2.8.0/Projects/NUCLEO-H753ZI/Applications/1_Image/1_Image_SECoreBin/Src/se_crypto_bootloader.c:222:(.text.SE_CRYPTO_Decrypt_Init+0x16): dangerous relocation: unsupported relocationC:/Program Files/ST/STM32CubeIDE_2.2.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.

I’m trying to set up flashing firmware and initializing the RTC clock on a blank or chip erased STM32H747Xi using the STM32Cube CLT package that contains the STM32_Programmer_CLI.exe command line tool. I can’t seem to write to the critical registers for RTC. Is there a procedure to set the RTC? If so, can you list the steps needed to do so?Thanks,Johnas

I tried to program my STM32WB09ke chip with my ST-LINK V3 MINIE. When pressing the Connect button on stm32cubeprogrammer, I got the DEV_TARGET_CMD_ERR. It says: unable to get core ID. When debugging with my J-Link, everything works completely fine. I can program, debug, ...When connecting my ST-Link to one of my other projects with other ST MCU but with exactly the same debug connector, It completely works fine. Here are my schematics: Does someone knows what the problem could be or am I missing something?I checked the SWDIO and SWCLK signals with my scope and everything looks fine. 

Hello ST team and community,I am developing a custom STM32MP257-based MPU board and I want to create a customized Linux OS for our own product.I would like to understand the officially recommended approach and the limitations of using OpenSTLinux/Yocto versus an Ubuntu 24.04 ARM64 root filesystem.My target hardware is:MPU: STM32MP257F Custom PCB/SOM Cortex-A35 used for Linux Cortex-M33 may be used for real-time firmware Custom DDR/LPDDR4 configuration Custom Ethernet/USB/SD/eMMC/UART peripherals Custom Device Tree generated/configured using STM32CubeMX Development host: Ubuntu 24.04 LTSI understand that ST's current Distribution Package supports STM32MP25x and allows users to create their own Linux distribution. Thank You,Vijaya.

Hello, I am working with X-NUCLEO-WB05KN1 together with NUCLEO-U083RC. I had previously tested U0 consumption in Stop mode and I got around 1.5uA (using 3.3V supply and LSI). From the datasheet it says that STM32WB05KZ should be an ultra low-power MCU, however I am using the Beacon app from the X-CUBE-WB05N software package and I am getting measurements of around 37mA. Is this related with the SPI firmware (DTM binary) flashed into the shield to run the example? I would like to achieve a consumption on the uA scale, do I need to make my own firmware to the chip? If so, is there any example and how to communicate with my U0?I am supplying 3.3V into the CN6 pin 4 and measuring with a multimeter so the ST-LINK is now being powered.BR 

Hello,We are currently working on STM32C542CCT6 from the STM32C5 series and developing custom Flash and Data Flash drivers.Issue 1 – Hard Fault when accessing FLASH_SIZEWhile executing code generated by STM32Cube, the following check causes the system to enter the Hard Fault handler:if (FLASH_ADDR < (FLASH_BASE + FLASH_SIZE)) /* Main User Flash */The FLASH_SIZE macro reads the value from the device information area. However, when the code attempts to access FLASH_SIZE, the system immediately enters the Hard Fault handler.If we manually hardcode the flash size value, the code works correctly.Our questions are:Is there any specific register configuration or initialization required before accessing FLASH_SIZE on this device?Is this region restricted due to Trust Zone or privileged access on STM32C5 devices?Issue 2 – NMI when reading Data FlashWe have enabled Data Flash by setting: EDATA_EN = 1We are trying to read from the Data Flash base address:0x09000000using a pointer-bas

Hello,The Neural-ART compiler (atonn) crashes with an internal assertion when I run `analyze` on a quantized 1D CNN. The crash happens on the pooling unit and I cannot get past it.EnvironmentST Edge AI Core v2.2.0-20266 (X-CUBE-AI 10.2.0), Windows, via STM32CubeMX Target: stm32n6 Also reproduced on ST Edge AI Developer Cloud with ST Edge AI Core v4.0.1-20581 -> same assertion, so this does not look version-specific.Model Keras model exported to TFLite, full int8 quantization (int8 input and output, per-channel), batch size fixed to 1.Architecture (1D CNN for signal classification):  Input [1, 3000, 1]  3x { Conv1D -> BatchNormalization -> ReLU -> Dropout -> MaxPooling1D(pool=2, stride=2) }     conv filters = 128 (k=30), 32 (k=20), 4 (k=10), padding 'same'  Flatten -> Dense(512) -> BN -> Dense(128) -> Dense(32) -> Dense(4, softmax)Input tensor quantization has a non-zero zero-point (scale ~0.0366, zp -2).When converted, TFLite lowers the model to CONV_2D (x

Hi everyone, We are encountering a XSPI Deadlock on our STM32H7S7-Discovery board (STM32H7S78-DK).To provide some context, our system is configured as follows: External FLASH: Connected to XSPI1. Swapped through XSPIM to port 2 and operates in memory mapped mode. MCE1 is activated across the entire address range using the AES-STREAM Cipher. External PSRAM: Connected to XSPI2. Swapped through XSPIM to port 1 and operates in memory mapped mode. MCE2 is activated across the entire address range using the NOEKEON-BLOCK Cipher. The issue occurs when running an LZO decompression algorithm. The algorithm reads compressed data from the PSRAM and writes the decompressed output back to the PSRAM, while the code is being executed on External FLASH. At some point during decompression, the core completely freezes, no HardFault or BusFault is triggered, and the debugger permanently loses its connection to the core. We have tried multiple approaches to resolve, including the offic

HiI saw the pad dimensions for the SGT070R70HTO listed in the datasheet.But I don't know the dimensions of the parts I marked in red. So I want you to tell me that. Thank you.

Hello,We are assessing security maintenance for an STM32MP1 product using linux-stm32mp. Could ST clarify the following? Is the maintenance policy in the 2021 "FAQ: Updating OpenSTLinux" (https://community.st.com/stm32-mpus-61/faq-updating-openstlinux-19) still current? How are security fixes delivered after a release: through component branches, tagged minor releases, or another mechanism? Has ST published updated guidance in preparation for the EU Cyber Resilience Act? Does ST assess kernel.org CNA CVEs against its vX.Y-stm32mp branches? Are per-CVE affected/fixed decisions published anywhere, such as a vulnerability list, VEX document, or CVE_STATUS entries in meta-st-stm32mp? For security vulnerabilities in ST-specific kernel changes that have not been upstreamed, what is the CVE assignment and advisory process? Where are fixes announced? The FAQ describes 1.5 years of feature development, 2.5 years of corrections, and a possible additional year of vulnerability-related relea

Setup: STM32H757 (device ID 0x450, rev V), ST-LINK/V2 firmware V2J48S7 over SWD, STM32CubeProgrammer v2.23.0 CLI on Windows 11.Problem 1: the CM4 boot address can't be set.STM32_Programmer_CLI -c port=SWD mode=UR -ob BOOT_CM4_ADD0=0x080E BOOT_CM4_ADD1=0x080Eprints "Warning: Option Byte: boot_cm4_add0, does not exist" (and the same for add1), and exits with code 0, so scripts don't notice. "-ob displ" shows only the single-core BOOT_ADD0/BOOT_ADD1, with no BCM4/BCM7. The silicon is dual-core: FLASH_BOOT4_CUR (0x52002048) reads correctly, and BCM4/BCM7 are set in FLASH_OPTSR_CUR.Cause, as far as I can tell: in Data_Base/STM32_Prog_DB_0x450.xml the H757 matches configuration 0 ("Security extension available && multi-core"). In v2.23.0, every dual-core field leaves out config 0, while the single-core BOOT_ADD0/1 does include it:BCM4 (FOPTSR_CUR): config "1"BCM7 (FOPTSR_CUR): config "1,4,5"BCM4, BCM7 (FOPTSR_PRG): config "1,4,5"BOOT_CM4_ADD0/1 (FBOOT4_CUR and _PRG): config "1,4,5"BO

I am going to build linux system on a board based on STM32MP257F and have read many kinds of related technical documents.In the process, a question bothers me. I want to modify only several components such as uboot and kernel in existing STM32MPU Distribution Package. To do that, the STM32MPU Developer Package is needed because their source cdoes and build tools are required. This is where the major problem lies. Those are as follows:To build the source files, what is used between Developer Package’s SDK and Distribution Package’s BitBake ? After the modified components are built anyway, how and where are their binary images added into the Distribution Package including their configurations ?I have read in the documents that interoperation between the Developer Package and the Distribution one is available.But, I have not found out its actual usage example.

I’ve configured dual channel simultaneous with overrun overwritten and DMA. I’ve connected ECN 1313 incremental signals directly to MCU differential adc. 10ksps, 64.5 ADC sample time, 50MHz ADC clock. The noise on 12bit sampling is more than expected comparing to 10bit. Or in other word noise in 10bit is less than expected compared to 12 14 16!!!12 bit capture10bit data capture, as you can see in 12 bit capture red and green dots suggest there should be at least 8 code levelIt seems I have more noise than expected in 12 bit data capture, doesn’t it? Also I have attached .ioc. and there the only parameter i am changing manually is the bit depth in main.c manually is “hadc1.Init.Resolution =”.And here is my statistic calculation:statisticsI think there is something wrong with the hardware! Because 12 bit reading is consistent with 14 and 16 bit depth. It means hardware have more noise on sampling 12 14 16 bit and it seems odd! I havev also checked errata and there was only told if you ha

Subject: STM32MP257F-EV1 (MB1936D) not booting after PA6/PA7 MDF1 rework + SAI2 speaker addition — no console output, no USB DFU enumerationBoard: STM32MP257F-EV1, board reference MB1936DBackground — MDF1 microphone rework:We were bringing up PDM microphone capture on MDF1 (channel 6, PA6=SDI6, PA7=CCK0). On this board revision, PA6/PA7 are hardwired only to the onboard RTL8211F Ethernet PHY (ETH3.TXD0/TXD1 via series resistors R169/R175) with no external header access. To route these pins to MDF1 instead, we physically soldered a wire tap onto R169 and R175, and disabled Ethernet in our device tree so MDF1 could claim PA6/PA7 without a pinmux conflict.Background — speaker interface addition (same device tree, added afterward):Separately, we added a playback path using a MAX98357A I2S digital audio amplifier driving a 4Ω/5W speaker, over SAI2A:- CN5 pin 12 (PJ11, SAI2_SCKA) -> MAX98357A BCLK- CN5 pin 35 (PJ3, SAI2_FSA) -> MAX98357A LRCLK- CN5 pin 38 (PJ12, SAI2_SDA) -> MAX9835

I previously wrote the code for my project and generated the HEX file. I copied my project folder from the workspace_2.1.0 directory to a USB flash drive.Now, when I open this copied project on a new PC using STM32CubeIDE, I cannot find the page where the settings for generating the HEX file are configured.Could someone please help me?  

Hello,I am facing some issues with NetXDuo, where i see traffic on the RGMII RX lines, but RX DMA does not process any frames / no interrupts fire. I have the following setup:I am using a custom board based on the STM32N657 with an ADIN1300 Gigabit Ethernet PHY connected over RGMII.Software stack:STM32Cube FW_N6 V1.3.0 ThreadX NetXDuo Static IPv4 configuration Secure only application Caches disabledThe PHY is configured over MDIO and link comes up successfully. The resolved PHY speed matches with what is seen on the host side and with the MAC speed configuration.What is working:The PHY side appears to be working correctly. For example, when forcing 10Mbps, i can clearly probe the RGMII lines and see:RX_CLK present RX_CTL activiy for each incoming ARP/ping RXD0..3 activity during the frameThis confirms that Ethernet frames are being received by the PHY and forwarded onto the RGMII interface toward the MCU.The following have also been checked/tried:RGMII pin mux tried disabling broadcast