Unable to Access External HyperRAM in Memory-Mapped Mode on STM32N657X0H3Q...

[Shivani]

Hello ST Community,

We are working with the STM32N657X0H3Q controller and interfacing an S80KS5123GABHB020 HyperRAM using the XSPI1 (Octal SPI) interface. The external HyperRAM is intended to be used as the LTDC frame buffer.

We have configured the HyperRAM in memory-mapped mode, and according to our configuration, it should be accessible at the address 0x90000000.

However, we are unable to access this memory region. Any read or write operation to 0x90000000 fails. For initial testing, we have configured the XSPI clock to 2 MHz.

Our setup is based on the STM32N657-DK board example, and we have followed the same memory-mapped configuration.

Could you please let us know if any additional configuration is required to access the HyperRAM at 0x90000000? Specifically, we would like to know:

• Are there any additional XSPI configurations required for memory-mapped mode?
• Does the MPU or cache need to be configured for this external memory region?
• Are there any system, clock, or pin configurations that must be enabled before the memory becomes accessible?
• Are there any additional initialization steps required when using HyperRAM in memory-mapped mode?

Any suggestions or guidance would be greatly appreciated.

Thank you.

 

[KDJEM.1]

Hello ​@Shivani;

 

I recommend you to start with simple project (without using LTDC).

To start with OCTOSPI configurations and settings, I advise you to start with Getting started with Octo-SPI, Hexadeca-SPI, and XSPI interfaces on STM32 MCUs - Application note and precisely examples sections.

 

Thank you.

Kaouthar