S25FS512SDSBHV213 Flash getting locked through STM32 Cube programmer

[kadam]

Hello Team,

In our custom Board, we are using STM32N657 and S25FS512SDSBHV213 Quad flash. We observe that flash is getting locked after several times of re-flashing. For flashing we are selecting start address is 0x70000000 and external loader as per below image

During each re-flashing, we first perform full chip erase and then after we flash firmware.

As per S25FS512SDSBHV213 flash architecture by default Hybrid sector option for erase. For Uniform erase we need to configure OTP. We have not fuse OTP inside flash.

It would be very helpful if you could guide us in identifying the root cause of this issue and suggest any recommendations to prevent the flash from getting locked after repeated erase and programming cycles.

Quick response is highly appreiciated.

Thanks

[jiangfan]

The first thing to check is whether the selected external loader actually supports the flash fitted to your board. MX25UM51245G_STM32N6570-NUCLEO is a loader for an MX25UM51245G device, whereas your board has a S25FS512S. The shared 512-Mbit capacity does not make their command sets, erase geometry, or protection behavior interchangeable. Using a mismatched loader could cause incorrect erase/program operations or leave the device in an unexpected state.

NOTE: reviewed answer with help of AI

[jiangfan]

Recommended checks

1. Use a loader specifically written and verified for the S25FS512S and the board’s actual memory interface/configuration. Confirm that it handles the device’s erase regions and sector sizes—not just its total capacity.
2. Verify the flash identity and status after a failed operation. Read the JEDEC ID and the device’s status/configuration and protection registers using the flash vendor’s documented procedure. Check whether the device is busy, in an error state, or whether block protection, sector protection, or password/security protection is enabled. “Locked” can describe several different conditions.
3. Check the erase commands and address range. Confirm the loader’s “full chip erase” implementation is supported by this exact part and that the selected start address and memory mapping match the board. A 64-MB capacity alone does not confirm the loader’s erase behavior is compatible.
4. Investigate the hybrid sector configuration separately. Hybrid versus uniform erase geometry can affect which erase command is valid for each address range. Do not program OTP or change one-time configuration bits as a troubleshooting experiment; those changes may be irreversible. First confirm the intended configuration and supported procedure in the exact S25FS512S datasheet and programming documentation.

NOTE: reviewed answer with help of AI