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Hello powerSTEP01 Experts, we did a re-design of our powerSTEP01 driver PCB. Unfortunately, we created a problem in the new electronic, which causes the powerSTEP01 not working anymore and after weeks of test and research, we can't find the reason for this. So, we hope someone can give any advice to locate problem. The device is behaving like follows: After a power reset, the first drive command causes a current pulse of 3A at 4V von OUTA and the motor stalls.  After this, the voltage level on OUTA1 and OUTA2 remains GND. On OUTB1 we have 1V.  The STALL_A, STALL_B and OCD bits remain set to 1 (no error)  It seems like the powerSTEP01 is trying to move the motor, not knowing that OUTA isn't working.  We have several new electronics behaving like this.Did anyone observe this behavior before? What can be the reason for this? Thank's in advance,Stephan

I am using LSM6DSV16X with MLC configured in MEMS Studio v2.3.1. The MLC has an IIR2 high-pass filter on accelerometer XYZ with "store in FIFO" enabled. The UCF was generated by the MLC Tool (internal version 2.4.4 as reported in the output JSON). Expected: IIR filter output values appear in FIFO as tag 0x1B frames, as declared in the mlc_identifiers section of the generated JSON. Observed: Tag 0x1B frames never appear in the FIFO. Firmware drains the FIFO after each 60-sample window and observes exactly 3 MLC words per window — 2x tag 0x1C (features) and 1x tag 0x1A (result). No tag 0x1B words arrive. Verified:- EMB_FUNC_FIFO_EN_B (0x45) = 0x02, MLC_FILTER_FEATURE_FIFO_EN bit is set (confirmed against DS13510 Section 13.18)- mlc.json correctly lists fifo_tag 0x1B identifiers (FILTER_HP_ACC_X/Y/Z) in the metadata- mlc_settings.json has "input": "Acc_XYZ + store in FIFO" for the filter- Firmware FIFO drain handles tag 0x1B explicitly — not dropped in software- No unknown FIFO tag warnin

Hello,I am working on a custom FOC Inverter Board.  I am trying to assign the pins for current sensing, but I keep getting warnings.  I am using an STM32G431CBT6 MCU, and I completed all the other pin assignments without issue.  Here is the Current Sensing information:"Three Shunt AmplifiedCurrents using External Op-Amps"CURRENT_AMPL_U -> Assigned to PB14 ADC1_IN5CURRENT_AMPL_V -> Assigned to PB12 ADC1_IN11CURRENT_AMPL_W -> Assigned to PB11 ADC12_IN14It looks OK in the board designer application with no warnings, but when I try to generate the project in Motor Control Workbench, it gives me the following errors: I cannot find any documentation on the list of warnings/errors.  How do I correct this?  Or can it be ignored?

The issue feels really simple, and it's easy to do on N6. At the core, I am running out of MPU regions as there are only 8 available. So it would be nice to have a small chunk of SRAM, where privileged code can share data with unprivileged code. Say a status or something like this.GTZC only controls both read and write. So I cannot say that a single 512 byte block is read/write for privileged code, but read only for unprivileged.  

I need to connect a USB Type-C connector to the USB OTG interface of the STM32H7B3ZI microcontroller. Is this possible? If so, could you provide the connection diagram, explain which pins need to be connected, and share a reference schematic or wiring diagram for the implementation?

This is a sister thread to this one.Essentially, I can’t get a ping out of either Nucleo-H755ZI-Q or STM32F779I-EVAL, the other thread focuses on the Eval board.I’ve tried many examples but I’m focusing on this one. There are other threads about this example but I think they may have got lost in the migration.I’ve attached the project as it sits on my computer.The STM32 device’s IP address is 192.168.2.180.If I ping it on my PC, I get Request timed out.This is my network configuration.The Nucleo board is connected to a TP-Link Ethernet switch, which my PC is also connected to.Do you have any idea why this is not working?Thank you.

Dear mister/misses, Regarding the latest version of MEMS Studio with AlgoBuilder I have the following question:How can I create a AlgoBuilder firmware target for the NUCLEO-L073RD+X-NUCLEO-IKS02A1 (IIS2DLPC)? How to import this target in the AlgoBuilder.The step I have taken so far:a) Create a CubeMx file for this configuration using the MotionTL library.b) Generate Code (open+build in CubeIDE) and program firmware in MEMS Studio using binary file obtained from CubeIDE.c) Successfully connect to setup in MEMS studio and real-time evaluate Motion Tilt. I have included the used CubeMX file for more information. Kind regards,D. 

I have been working with the single core LoRaWAN_End_Node example application on a B-WL5M-SUBG1 board with good success.  With STM32CubeMx v6.16.0, WL Firmware 1.4.0, I see a current draw of under 2uA between transmissions.Last week I upgraded STM32CubeMx to v6.17.0 which in turn upgraded the WL Firmware to 1.5.0, changed the end node example to use the LBM library rather than the LmHandler for managing the radio, and changed the example application name to LoRaWAN_End_Node_LBM.  The application functionality is good but the power consumption jumped to around 80uA between transmissions.In both cases I configured pullups in the USART2 pins (PA2, PA3).I can alternate between these two versions of the application on the same board and the results are very consistent.Has anyone else seen this and does anyone have any suggestions?

Hello, I am re-posting this.My original post on the old forums seems to have disappeared !?!I have prepared an SFI (with firmware, debug authentication key and option bytes)After SFI I want to boot to address 0x0C000000To achieve this I have programmed Option Bytes:BOOT_UBE = 0xB4 (OEM-iROT)TZEN = 0xB4PRODUCT_STATE = 0x72 (closed)(and some other bytes) After (successful ??) SFI, the Option Bytes are not programmed correctlyIt seems that SFI terminated early. PRODUCT_STATE is 0x17, UBE = 0xC3 Programming log is attached Am I being stupid? Am I missing something…? Note : I cannot attach the programming log because the attach feature does not work anymore. But it’s not really a useful feature anyway right? Who needs it. So I have made a copy-paste instead. 14:18:32 : Requesting Chip Certificate from device ...14:18:32 : Reading chip Certificate finished14:18:32 : Get Certificate done successfully14:18:32 : requesting license for the current STM32 device14:18:32 : Init Communication ... 14

I’ve followed the instructions for the STM32WB55 as a BLE sniffer, but I cannot get the st_ble_sniffer.py script to recognize my device as a BLE sniffer for usage in wireshark. Is this supported at all? Or are slight modifications required to make this work? As far as I can the tell the --extcap-interfaces should list all capable interfaces, but even the output example here does not list any example. The current result is that there is no entry in wireshark to use the STM as a sniffer.I’ve already tried updating the internal device.pid to 14163 instead of 14155 to account for the updated integrated ST-LINKv3

Hi everyone,I’m currently working on a design to integrate an ESP32-C6 with the ST85MM PLC modem, and I’m hitting a few roadblocks regarding the best hardware architecture and communication flow.To be honest, I'm also a bit confused about the specific differences between the ST8500 and the ST85MM. I’ve been reading documentation for both, and while they seem very similar (same package, similar pinouts), I'm not clear if the host interface or boot behavior differs significantly between them.Crucially, I haven't been able to find any firmware examples or reference code for either chip. I feel like I'm flying blind regarding the actual host communication implementation. If anyone has a code snippet, a repository, or a specific application note that shows how to initialize the modem or handle the host exchange, that would be appreciated.My main goal is to use the ESP32-C6 as the host controller to manage the ST85MM, specifically for loading firmware

Greetings,I am working on a Hardware-based password manager. When the device is first setup, A 512-Bit key is created which is used to encrypt & decrypt the passwords. This key will be stored on STSAFE-A's Symmetric Key Table and the password can be encrypted/decrypted using this key on the STSAFE-A.Now, I want to be able to set a user specified password on the STSAFE-A and then this password will be used by STSAFE-A to authenticate before performing any encryption/decryption/etc operations. After a set amount of wrong attempts, STSAFE-A should erase the key.Is this achievable?Regards,Aditya M.

Hi there,the VL53L5CX datasheet mentions that RSVD6 is a GPIO and defaults to being an open-drain; my question is:Can I use RSVD6 programmatically? Are there any resources which show it being used? Otherwise, how can I use it? Many thanks in advance

couldnt able to validate model because of the encryption , could anyone found the encrypted model let me know , Thank you in  advance 

I have read the migration guide (Typical HAL ADC use cases for migration - HAL2 Migrator 1.0.0 documentation) as well as the article How to use ADC with STM32CubeMX2 | CommunityIn the HAL2 code, I found functions such as HAL_ADC_MM_SetConfig(), which suggests that ADC multimode/dual mode is supported by the HAL.However, when using STM32CubeMX2 (not STM32CubeMX), I cannot find any option to configure ADC dual mode (e.g., ADC1 + ADC2).My question is:How can ADC dual mode be configured in STM32CubeMX2?If ADC dual mode configuration is currently not supported by STM32CubeMX2, a short confirmation would be appreciated. Thanks in advance for your help.

I am having trouble connecting to the STM32N6 with SWD.I have implemented a design using the STM32N645X0H3Q (though I have placed the STM32N647X0H3Q) using external VDDCORE. R110 is not mounted (to set VLXSMPS to NC).On startup I have VDDIO (3.3V) and VDDA1V8ON (1.8V) to the MCU, and the MCU activated PWR_ON (I have VDDA1V8ON to the PDR_ON pin, A1 on another page). This activates the reset of the power, including VDDCORE. All voltage measurements are as expected on the board.When I try to connect to the board using SWD in STMProgrammer (v2.20.0), I see the 3.3V, but the STMProgrammer does not connect. I am using a Minnie V3 (v V3J16M8) on Windows. I have tried lower frequencies and all modes and reset modes without success. I should mention that on my prototype board, I have not mounted external crystals, flash or ram. Though I believe that is not necessary for STMProgrammer to see the MCU. Any help is greatly appreciated!

Hello everyone. I am trying to communicate with a VL53L4CD on my PCB, on the same I2C Bus I have a LP LED Matrix Controller and an EEPROM that work just as I hoped they would.  But none of the VL53L4CD seem to be able to communicate over the Bus. I have by now tried to look at everything possibly wrong with it.  Software: The Software gives out the exact I2C Signal I would be expecting (Address 0x52 (derived from 0x29 of course)) but I always get NACK’s,  Hardware: All Sensors are on the same bus, where I Chip Select via the XSHUT Pins, those forms also look correct and only the one is high where I want to talk to the sensor, so there’s not 2 sensors that could respond to the same address having XSHUT on the same niveau. I have tested the connection to the pads, and those are all correct, so is the Power SUpply and GND to the Chip all of those seem correct according to the Datasheet.  My I2C Bus runs on 100kHz which as far as I can tell should work with the Sensor.  Furthermore I have

In many NetX Duo Ethernet sample projects, HAL_ETH_Start_IT() is not called depending onthe timing of the PHY link‑up. When this happens, Ethernet communication never starts.The behavior appears to be related to how App_Link_Thread_Entry() handles link status:- nx_ip_interface_status_check() is used to check the NX_IP_LINK_ENABLED status.- nx_ip_driver_direct_command() issues NX_LINK_ENABLE or NX_LINK_DISABLE when the PHY link state changes.Normal behavior- If the PHY is link-up at startup, HAL_ETH_Start_IT() is called during initialization.- If the PHY is link-down at startup, App_Link_Thread_Entry() later detects the link-up,  issues NX_LINK_ENABLE, and HAL_ETH_Start_IT() is called correctly.Problem caseIf the PHY is link-down at startup but becomes link-up before App_Link_Thread_Entry() starts running:- The thread does not issue NX_LINK_ENABLE or NX_LINK_DISABLE.- HAL_ETH_Start_IT() is not called.- Ethernet communication cannot be established.In PoE environments, the power‑on to lin

When I connected an original board with STM32WBA5MM chip mounted to an STM32Cube Prog via ST-LINK, the message DEV_UNKNOWN_MCU_TARGET was output. Checking the JTAG signals, the DP_DPIDR output was 0x0BE11477. This code is described in the reference manual (RM0493) as not being implemented. What is happening?

Hi.For our footprint definition we require a confirmation from you: The letter ‘C’ in the Pin Count ordering information is used for both 48 and 49 pins packages. The WLCSP package is 49 pins.Thanks in advance,Noam  

Hello, I noticed Reduced wireless charging efficiency when transitioning STWLC38 from chip revision 0x3 to 0x4. I am seeing an e2e efficiency difference of 5% at full load (5.55V, 400mA) when using the same BOM as the chip revision 0x3 and am confused about what changes may be contributing to this behavior. I need this information to determine if I need to repeat involved FOD calibration on my design. I noticed that chip revision 0x4 requires a different patch and config. I have included my old and new config below:Revision 3 Config - Biggie_Smalls_Rx_UV1_Rev1_6-26-25_5v5out.memhRevision 3 Patch - (I was not using any NVM Patch)Revision 4 Config - Biggie_Smalls_Rx_UV1_Rev1_6-9-26_5v5out__Config_1077_cut1.3_3.memhRevision 4 Patch - STWLC38JRM_Patch_1656_rtx.memhZip file with memh files because the .memh was blocked (attached)Please let me know if there are any changes or measurements that could help understand the issue. I am using BPP at 5.55Vout and am using a custom transmitter desig

Hello everyone,I am developing a UI using TouchGFX on a custom board based on the STM32F767. I am encountering visual artifacts during screen updates.As seen in the attached video:In the date selection wheel, the text overlaps, tears, and leaves ghosting artifacts during scrolling.The first menu ("Date & Time", "Language" etc.) is inside a ScrollableContainer with a ListLayout. Initially, the text is corrupted. However, as soon as I scroll this container, the artifacts disappear completely and the screen draws correctly.System Info:MCU: STM32F767GUI: TouchGFX (Version: [Sürüm] )Memory: Framebuffer is located in [SDRAM vb.]Configuration: MPU is ENABLED, D-Cache is ENABLED.What could be causing this issue? Any suggestions on which configurations or settings I should check?Thank you!

Even though in the documentation there is an explicit paragraph declaring that “Exclusive monitor” are present (I cannot copy here, the documentation states that I’m not allowed), but my test seems to prove otherwise.If I try to use ldrex/strex on a variable i SRAM (MPU RASR configured for Shareable, Non-Cacheable, Non-Buffereable) I get a BusError, if I remove the Shareable bit the the exclusive mechanism do not work.Could someone confirm my analysis?Regards

After an aborted attempt to get the PSSI interface on the STM32N6 to work with DMA, I have decided to try a different part, the STM32H7A.  Running into a similar problem attempting to get the DMA to work.Here is a snap-shot of what I see:After receiving HAL_OK from HAL_PSSI_Receive_DMA(). I get the error interrupt with an error code of 0.  As may be seen, there is a DMA Transfer error.  This is running on the Nucleo-H7A3ZI-Q board.  The clock tree has been changed to increase the clock speed:The PSSI clock is produced by a PWM Timer and set to a frequency of 10MHz.  Data is from a 12 bit ADC with an active high Ready.  DE is not used.  I have a pull-up on Ready.  With HAL_PSSI_Receive_DMA() in a loop from a frame timer, each call returns HAL_OK followed by the error interrupt.The PSSI setup:The DMA setup:I’ve been studying the examples given on this board for both the H5 and the H7.  Whereas the N6 produced an immediate error response to multiple PSSI DMA attempts, the H7A does not.  T

Hi all,I'm trying to read the DAC output value using the integrated ADC and the connection to it (channel 19). However, I only read random values between [0;2] units. The DAC works properly using the integrated buffer. I route the DAC output to the external pin and to on-chip analog peripherals, so I can confirm the output with a multimeter. The ADC seems to work properly too: I can read internal temperature, VrefInt, and 2 input pins with scan mode. However, when I enable the VDAC_OUT1 and add it to scan mode, I get random values between 0 and 2 (only for VDAC_OUT1, the other readings are fine). Sample times are abondant (few us); I have tried different sampling values, but, as expected, it doesn’t change anything.I configure this setup with the latest version of CubeMX. Readings and DAC configuration are performed using basic HAL (no interrupt and no DMA).Does anyone have an idea to fix this issue?