GPIO State Retention During IWDG/WWDG Reset on STM32H745ZIT3

[saichand]

Dear STM32 Community,

I am using the STM32H745ZIT3 microcontroller with STM32CubeIDE for firmware development.

I am facing an issue related to GPIO behavior during a watchdog reset.

When a warm reset is triggered by either the Independent Watchdog (IWDG) or the Window Watchdog (WWDG), all GPIOs are reset to their default state. In my application, I need certain GPIO outputs (such as relay control signals) to retain their previous state during a watchdog reset, or at least avoid changing state until the application reinitializes them.

Could you please clarify the following?

1. Is it possible to prevent GPIOs from resetting during an IWDG or WWDG reset on the STM32H745ZIT3?
2. Are there any software techniques to retain the GPIO output state across a watchdog reset?
3. If GPIO retention is not supported, what is the recommended approach to prevent unwanted output glitches during a watchdog reset?

Any guidance, application notes, or recommended design practices would be greatly appreciated.

Thank you for your time and support.

Best regards,

sai chandu

[mƎALLEm]

Hello ​@saichand and welcome to the ST community.

That’s not possible to retain the GPIO state after reset.

One of the solutions is to use an external latch that saves the GPIO state when the MCU is in reset state.

Need to add pull-up/pull-down resistors (according to the active state) on the latch input to prevent them to be floating when the MCU is in reset state.