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I am using a STM32H723ZGT6 based custom PCB. The PCB is being soldered using ChipQuick’s TS391LT solder paste and CQ4LF-0.5 no clean liquid flux it is then cleaned using isopropynol (IPA) and an anti-static brush. We are using the hot air gun at 350 C. These are our findings so far with respect to the corrosion issue:There is a pale yellowish gunk deposit near the pins of the micro-controller which i suspect is the flux residue carried by the IPA and getting removed due to small pitch of the IC. The solder mask above the copper layer (specially the ground) underneath the STM chip getting pealed off. The exposed copper getting corroded (as shown in the picture - bluish part under the removed chip) There is an off-white residue under the chip surface in shape of a dried out liquid spot.Since the average humidity of my area is 77% with a peat of about 90% we suspect that the gunk is trapping the moisture and a electrolytic cell is getting completed and hence the corrosion.These Boards wer

Hi STMicro team,On usage of MPN:M24LR64E-RDW6T/2, recent datecode: 102026 (WWYYYY)  , we find below difference:The difference is  C to D change in the chip RFID module :Old Build BoardRFID Memory Code: E0025C9196D23D96 Date Code: 2336 Result: 100% Pass RateNew Build BoardRFID Memory Code: E0025D71B0C4273 Date Code: 2610 Result: Boards Failed During FCT (100%) The customer has requested clarification regarding the change from "C" to "D" in the RFID memory code,.Could you please check with the supplier / STMicroelectronics and confirm the following:Is this only a product code/marking change? Is there any change in component characteristics, specifications, firmware, or functionality compared to the previous build?

We are planning to use the ISM6HG256X IMU sensor in our project, and the hardware schematic design has been completed. However, we require your support and guidance regarding the PCB component placement and layout guidelines for this sensor.I checked your website but could not find the relevant design guidelines document. Could you please share the recommended PCB placement and layout guidelines or any reference design documents for the ISM6HG256X?I have currently referred to the attached link for the PCB layout, but I am unsure whether it is suitable for this specific part. Kindly review it and confirm whether we can follow these guidelines for our design.https://www.mouser.com/pdfDocs/tdk-invensense-an-000393.pdf?srsltid=AU7gw4W_Lzlaxx-gOvdePEKD_s1CUUAuo-9goEXh4Y9QeqimJJdTN617

The oemirot provisioning tool expects the TrustedPackageCreator_CLI inside the same folder under mac osx silicone of the STM32CubeProgrammer. This yields an error for the provisioning.py script of these examples. So the python scripts won’t work anymore. I guess the development teams did not synchronise this fact.

Hi there I have a STM32MP257f-DK board running the latest Linux, and I’m trying to output to a waveshare 9.3” HDMI display at its native resolution. 1600x600I can output to it at 1920x1080. and I can output to the display from my Mac at it’s native 1600x600. I see a slight flicker when I try send video then black. then the display goes to sleep. So the display is losing sync.linux reports the output is working, but it seems it’s something to do with the ADZ7xx chip.any ideas?

I am currently developing a USB Mass Storage application using the STM32H563ZI with the following architecture:PC ← USB ← NUCLEO-H563ZI ← SD CardThe SD Card and USB Device have both been tested separately, and each works correctly on its own.However, after integrating the two, I would like to use USB MSC to expose the SD Card connected to the STM32H563ZI as a removable storage device on the PC. The PC is currently unable to recognize the SD Card properly.I would like to ask if there is any example code or reference project for the STM32H563ZI that demonstrates USB MSC with an SD Card.Thank.

Transitioning a working FreeRTOS project over to CMSIS_os2.  Got most of the bits and pieces to compile.  It’s not working (surprise).At the  simplest level, the patch of code that turns on an LED, then calls osDelay does not delay.  investigating the problem using vTaskDelayUntil (and bypassing the CMSIS_OS2 wrapper for this one call to eliminate the possibility that the error is in how the cmsis_os2 routine is somehow wrong), the problem is that the xTickCount never increments.  (HAL TICK works and increments).This triggers an error routine because the new timetowake is computed as less that the existing time.  Therefore, no delays.Going through error reports suggests that the TickCount interrupt never triggers.  This seems to be true.My thought is that the default priorities that are assigned are wrong, so in cmsis, which assigns interrupt priorities, is getting it wrong.  The main task is at priority 24 (PriorityNormal).   Tasks created for LED blinking are set at priority 26 and u

Hello, I am designing a circuit using the STM32WL3R with a single shared antenna for two transmit frequencies. My requirements are:- 315 MHz: TX output, low RF power (approximately -40 dBm)- 433 MHz: TX_HP output, high RF power (approximately +12 dBm)- One shared antenna- Separate matching networks for 315 MHz and 430 MHz I would like to avoid an external RF switch if possible. 1. Can both matching networks be permanently connected to the shared antenna feed point, while enabling only one PA path at a time?2. When TX is transmitting at 315 MHz, what is the RF impedance of the disabled TX_HP output? Can the TX_HP output and its matching network affect the 315 MHz matching? I would appreciate any recommendations regarding the RF topology and matching network design. Thanks. 

My STM32H743 application runs from internal Flash, with some code and data in external NOR via FMC. It runs stably for days without NOR issues, but after repeated external resets the board eventually becomes silent and will not recover with an MCU reset; power-cycling restores it. HAL_NOR_Init() has writes disabled, and captured pre-FMC pin levels were unchanged. What should I check to identify whether FMC/NOR initialization, access sequencing, or reset behavior causes the hang?

Dear ST Community,I am on the STM32WL55CCUX and am facing an issue with both the SubGHz radio initialization and the external 32 MHz TCXO/HSE32 clock.I have a working STM32WL55JC1 board for comparison. The same/general SubGHz software flow works correctly on the JC1, whereas the custom CCUX board exhibits the following two problems:The SubGHz radio remains permanently/continuously in the RF BUSY state. The external 32 MHz, 3.3 V TCXO is not being powered through PB0/VDDTCXO, and HSERDY does not become active.I would like ST's assistance in determining whether these two symptoms are related to the RF power/reset/TCXO sequencing, a CCUX-specific requirement, or a hardware/configuration issue. This is the current analysis so far                         JC1             CCUXPB0/TCXO supply Active 0 VHSERDY 1 0ErrorCode 0 0x02RFBUSYS after init 0 1STDBY_RC PASS F

Hello,Full application code is based off of LoRaWAN_End_Node_LBM.  I am using the below code to attempt to change the OTPR bits to boot from bootloader (system) for SPI connection.  This code is executed after receiving a command via SPI communications by another microcontroller.  The idea is for the other microcontroller to receive the update file and program the STM32WL55 via SPI.Pattern 13: nBoot0(bit) = 0, nBoot1(bit) = 1 and nSWBoot0(bit) = 0  FLASH->CR is 0x00000000I monitor the FLASH->OPTR register in debug and see that the OPTR does not change from 0x3FFFF0AA before reset.After reset, I lose connection with debug. I know it is still booting into Flash because it reconnects with our LoRaWAN Gateway.Am I missing something?  Trying to piece things together with three different documents and trying to determine if BFU_1_Slot is relevant and how it can be modified for SPI.  Are there any clear example code specifically for my device that already demonstrates what I am attempti

Hi,On the SR6P3C4 page (https://www.st.com/en/automotive-microcontrollers/sr6p3c4.html) there's a databrief. But not much about a datasheet, specification, or any deeper information about the modules associated with it. Is there a way to access those?Also (still related to the first question), the data brief does say something about maximum junction temperature of 165C, with a note:Nominal specification up to 150 °C. Delta specification up to 165 °C.I'm not sure to understand what does the delta specification means.Thank You

I’m starting a project with the STM32H7B0 which will heavily utilize the DFSDM (DFSDM1, specifically).  I see that there are eight filters in this instantiation, unlike other STM32s I’ve used which only had four.  But when I look at the DMAMUX inputs (Reference Manual Table 102), I see only four assigned to DFSDM1: numbers 101-104, labeled DFSDM1_dma0/1/2/3.How are these four lines mapped to the eight DFSDM1 filters?  The obvious interpretation would be that they come from filters 0-3, and filters 4-7 aren’t DMA capable at all.  But then why include the extra four filters?  Does anyone actually use the DFSDM *without* DMA (there’s no FIFO...)?  What am I missing here?

Hello everyone,I am using a VL53L0X and have encountered an intermittent failure. I would like help identifying the possible cause and the next debugging steps.Hardware setup: MCU: Cortex-M0, model MM32SPIN06PF I2C: GPIO bit-banged I2C in open-drain mode, with 4.7 kΩ pull-ups. An ENS210 temperature/humidity sensor is also on the same I2C bus. ENS210 address: 0x43. VL53L0X 7-bit address: 0x29; 8-bit address: 0x52. The VL53L0X XSHUT pin is only pulled up to 3.3 V through a 10 kΩ resistor. It is not controlled by an MCU GPIO. VL53L0X supply voltage: 3.3 V. VL53L0X API version: 1.0.4. Failure symptoms: The VL53L0X works normally at first, but occasionally malfunctions. When the failure occurs, no IR emission can be seen from the VL53L0X using a phone camera. Can IR normally be seen with a phone camera? ____ Pressing a hardware button to re-initialize the VL53L0X does not recover it. Only after power-cycling the VL53L0X alone and then pressing the button to re-initialize i

I am into configuring a STM32H750VBT6 and I want to configure ETMv4 inside the code of the program and my objective is to detect and capture data on 5 trace pins.I configured all trace pipeline including, CSTF,ETF,ETM,DWT and TPIU. also I considered opening Locks, enabling TRCENA in CoreDebug_:DEMCR and enabling required clock domains in DBGMCU_CR.After all I am just sighting clock signal on TRACECLK pin. I also checked TPIU unit if it successfully outputs test patterns like AA55 and FF00. Test patterns worked properly but when disabling test pattern only clock comes out through the trace pins.I am looking for someone who configured that before to help me prevail it.here are my functions:#include "ETMv4.h"#include "core_cm7.h"uint32_t startAddr = 0;uint32_t stopAddr = 0;void Parallel_Trace_configure(){ TraceGPIO_Configure(); Disable_ETM(); TPIU_Configure(); ETF_Configure(); CSTF_Configure(); ETM_Configure(); SetupStartStopAddr(); DWT_Configure(); Enable_ETM();}void TPIU_Config

Subject: STM32N657X0H3Q Power Sequence Deviation – Impact on Reliability and OperationHello,I am designing a custom board based on the STM32N657X0H3Q, using the STM32N6570-DK as a reference. The MCU is configured to use the internal SMPS for VCORE generation.Unfortunately, my design does not fully comply with the recommended power sequencing described in the documentation:The various 1.8 V rails are generated from a single DC/DC converter. VDDA18USB, VDDA18CSI, and VDDA18ADC are powered directly from this 1.8 V rail. These rails are not gated by PWR_ON and therefore may become valid before or simultaneously with the PWR_ON assertion.The MCU appears to boot and operate correctly during initial testing, but I would like to understand the implications of this deviation from the recommended power sequence.My questions are:Does powering VDDA18USB, VDDA18CSI, and VDDA18ADC before (or independently of) PWR_ON create any risk of device damage or reduced reliability? Are there any known functio

STM32F303 official SVD v1.3: Missing TI1_RMP field in TIM16_OR registerHello ST team,I found a missing bit-field definition in the official STM32F3 System View Description (SVD), version 1.3.Affected file: STM32F303.svdOfficial download:https://www.st.com/en/microcontrollers-microprocessors/stm32f303rc.html#cad-resources1. Issue descriptionThe TIM16 peripheral includes the OR register at offset 0x50, but its SVD definition does not contain any <fields> element:<register> <name>OR</name> <displayName>OR</displayName> <description>option register</description> <addressOffset>0x50</addressOffset> <size>0x20</size> <access>read-write</access> <resetValue>0x0000</resetValue></register>2. Reference manualAccording to RM0316 Rev. 10, Section 23.6.17, page 767, the TIM16 option register contains the following field: Register: TIM16_OR Address offset: 0x50 Field: TI1_RMP[1:0] Bit p

Hello,I was checking if it is possible to test my M33 NS code I generated using CubeMX would work in Developer Mode. However, the information found on internet suggest it being difficult as it requires the clock to be configured by M33 and also needs RIF accesses making it difficult. Without proper documentation on use case and how to use developer mode, it becomes challenging to work on a project within a stipulated time. So please, I would request for the help and Information to test and debug the code in Developer mode. Thanks for the support.With regardsAmit

 I have a problem with the Viper265K. I copied the basic circuit from the eval board (STEVAL-VP26K01B).The desired input voltage range is 90-465VAC 50/60HzOutput voltage 12VOutput current ~0.1ACurrently, I have a resistive load connected to verify the power supply. Unfortunately, the output voltage collapses at higher input voltages >420VAC or it just switches on/off very briefly.The coil L201 is a 7447714102 with I: 0.43A / Isat: 0.55AWhen I replace L201 with the inductor from the eval board, the maximum input voltage is still not higher.But the eval board works perfectly with 12V and the maximum input voltage as declared by ST.What am I doing wrong? Bottom Layout 

Summary This guide explains how to take an existing STM32CubeMX2 project, generate a CMake project from it, and then import it into STM32CubeIDE. Prerequisites STM32CubeIDE version 2.1.1 STM32CubeMX2 version 1.0.0 1. Generate a CMake project from STM32CubeMX2 Create an STM32CubeMX2 .ioc project. In Project Manager → IDE Project (IDE Project Generation area), set: Format: CMake CMake toolchain: GCC Destination: a folder where the CMake project should generate. Click Generate IDE project. When generation completes, verify that the destination folder contains: CMakeLists.txt Core/, Drivers/, and other generated folders. The .ioc file. Figure 1. IDE project generation   2. Open the STM32CubeMX2 CMake project in STM32CubeIDE Launch STM32CubeIDE V2.1.1 and select your workspace. From the main menu, choose:[File] → [New] → [STM32 Project] → [STM32 Project Create/Import].Select [ST

SetupI am programming a STM32H7 in STM32Cube VSCode. I have two peripherals (SPI1 & SPI2) connected to the same clock PER_CK.IssueCubeMX is supposed to generate the clock configuration code inside the PeriphCommonClock_Config() function (because several peripheral share the same clock). Inside Boot, everything is done fine. Inside Appli, the function PeriphCommonClock_Config() is declared and called correctly. However, its definition is missing inside main.c. This yields :  [build] [...]/fw/Appli/Core/Src/main.c:97:(.text.main+0x10): undefined reference to `PeriphCommonClock_Config'Current WorkaroundI am currently defining PeriphCommonClock_Config() inside “USER” code blocks. This allows the build to happen with no problem. However, if I make changes to the Clock Tree and regenerate code from CubeMX, then I will need not to forget to adapt my definition of the function. This can’t stay like that.QuestionCan someone confirm this is an issue and not expected behavior from CubeMX ? Ca

I am working on secure boot and firmware encryption on a custom STM32MP257F board based on the STM32MP257F-DK.I have already provisioned the encryption key material into OTP and am testing encryption through Yocto using ENCRYPT_ENABLE = "1", with a 128-bit key for FSBL and a 256-bit key for FIP.I noticed that when I use the correct encryption keys, the board boots successfully.When I use a wrong key, flash fails with a decryption error.But when I remove the encryption settings from local.conf, the board still boots even though the keys are already provisioned in OTP.I want to understand why this happens. I thought that once the encryption keys are provisioned, the board should not boot without the correct keys.Could someone please clarify a few things?Is it normal for the board to boot with an unencrypted image even after the encryption keys are provisioned into OTP? Does provisioning the keys into OTP only store the keys, or is there a way to enforce encryption at boot? What is the re

I’m using CubeProgrammer v2.23.0 with the SDMMC_STM32N6570-DK external loader (no additional loaders). I have the boot switches in the boot0=L, boot1=H positions. I have looked at all the posts similar to this one, however none of the suggested fixes have helped.When I try to program the eval board I get the following error message ... NOTE: I am able to download a new GUI directly from TouchGFX to external flash and it is fine. So, this is obviously an issue with CubeProgrammer/settings within?