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lab1 · 2024-08-21

Good afternoon,I am attempting to write a bare metal C driver for an interrupt specifically on GPIOA8 for the nucleo-g031k8 (Cortex M0+). I believe there is an issue with how I am changing the register EXTICR in the EXTI. According to figure 29 (pg 3...

lab1 · 2024-08-22

Thank you, everyone, for helping explain how this register is configured. I can't say I am a fan of the naming conventions used here or the explanation in the RM, but it's starting to make sense! For future reference:PA[m] is a NO OP since the reset ...

lab1 · 2024-08-21

You're answer is true and is shown in the CR2 register cmsis header file (stm32g031xx.h): However, I'm still pretty lost here. I probably should have phrased my question differently.Because 0x00 is for gpio PA[m] how do I change this register to make...

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Configuring EXTI->EXTICR on Nucleo STM32G031K8 (Cortex M0+)

Re: Configuring EXTI->EXTICR on Nucleo STM32G031K8 (Cortex M0+)

Re: Configuring EXTI->EXTICR on Nucleo STM32G031K8 (Cortex M0+)