User Activity

I’m working on reading an ADC that’s interfaced with an STM32L4RET6, and I’m encountering an issue with data reception when switching SPI modes. Here’s the setup:The ADC has a data rate of 8000 Hz, so I receive a DRDY (active low) signal every 125 µs...
 I have an STM32-L4P5DK connected to an external ADC, with SPI2 configured to read ADC samples on every falling edge of the DRDY signal. The DMA1 configuration is as follows:DMA1 CHANNEL1: DMA_GENERATOR0DMA1 CHANNEL2: SPI2_TXDMA1 CHANNEL3: SPI2_RXThe...
I have an ADC connected to an STM32-L4P5DK. Data should be read in the background by the DMA controller. SPI TX is assigned to DMA1 CHANNEL2, and SPI RX is assigned to DMA1 CHANNEL3. Both DMA1 CHANNEL2 and CHANNEL3 are synchronized with EXTI1 (DRDY s...
Kudos given to