Hello,good idea is to open stm32h5xx_hal_spi.c collecting the HAL SPI drivers and inspect the code there a bit. You can find lines like *(__IO uint8_t *)&hspi->Instance->TXDR = (*hspi->pTxBuffPtr);or(*(uint8_t *)hspi->pRxBuffPtr) = *(__IO uint8_t *)...
Hello,you've noted NSS pin as an output, so I suppose the WB device is mastering the bus. Of course, once the NSS flows out from its non active level, it can be understand by slave as a valid communication start what causes synchronization issue (as ...
Hello,you've enabled full duplex mode. Correct function is HAL_SPI_TransmitReceive at this case. It depends on protocol with the device. I suppose you need to provide 8x SCK to write a command and then next 8x SCK to read the device status. You can c...
Hello,at new SPI applied at H5, the master starts the data transfer once the CSTART bit of the SPI_CR1 register is set, provided the SPI is enabled and the TxFIFO content is not empty. Both the SPI_TXDR and SPI_RXDR are sensitive to data casting (asm...
