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pxia.1 · 2023-05-24

my host interaction with STM32G431C8T6 SPI bootloader are functioning for a lot of jobs such as RW, but not for the whole-chip CRC. Here is the Logic analyzer captured data:Host=>BL, BL=>Host5A, A5A1,A55E,A5 cmd to run whole chip CRC00,A5......00,A50...

pxia.1 · 2019-12-12

in stm32cubeMX configuration of SPI in slave mode, it asks for user parameter input for clk prescaler, which then derives the clk rate. My understanding for SPI operated in SLAVE mode is that the master end, instead of the slave end, generates the c...

pxia.1 · 2019-12-16

Thanks to everyone here to help me understand this issue from different angles In the RM, SPI specific modes and control -- TI mode, here is the rationale to set the "Baud rate", now I understand it is in fact a signal integrity timing choice."In sl...

pxia.1 · 2019-12-12

Thanks for looking into this problem. Here is my environment:STM32H742ZGTx Device from STM32H7 seriesLinux version CubeMXVersion: 1.1.0Build: 4551_20191014-1140 (UTC)

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STM32G431C8T6 SPI bootloader whole-chip CRC cmd was acknowledged but address after that received neither ACK or NACK

SPI slave mode configuration requires user definition of clk rate

Re: SPI slave mode configuration requires user definition of clk rate

Re: SPI slave mode configuration requires user definition of clk rate