User Activity

STM32G474In RM0440 Rev 8, page 641, I learned the "DMACFG bit" in ADC configuration register (ADC_CFGR) set the ADC in either one-shot mode or circular mode. But there is a separate mode setting in DMA which is also one shot vs circular mode. If we u...
In the QSPI chapter of G4series reference manual, we can confirm the support of external QSPI flash chip in mmap mode: "memory-mapped mode: the external flash memory is mapped to the device address space and is seen by the system as if it was an inte...
NUCLEO-G474REMy design uses two timers, one in master mode(TIM20) and one in slave mode(TIM1).To have the master timer generate an update signal in the trigger output, I set its TRGO event selection as "Update Event". the CR2 value 0x200020 confirms ...
my host interaction with STM32G431C8T6 SPI bootloader are functioning for a lot of jobs such as RW, but not for the whole-chip CRC. Here is the Logic analyzer captured data:Host=>BL, BL=>Host5A, A5A1,A55E,A5 cmd to run whole chip CRC00,A5......00,A50...
 in stm32cubeMX configuration of SPI in slave mode, it asks for user parameter input for clk prescaler, which then derives the clk rate. My understanding for SPI operated in SLAVE mode is that the master end, instead of the slave end, generates the c...
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