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I want to know whether any option bytes should be set before doing global erase for STM32wb chip. After the initial 0x44 and 0xBB, the device doesnt respond to global erase command (0xFFFF).
Is it possible to run a custom radio stack on M4 core of STM32WB processor without using M0 core ? If yes, where can I find the manual to read about accessing radio peripherals from CPU1
where can I find the documentation for 802.15.4 Phy layer API?
Is it possible to write a custom co-processor binaries for CPU2 instead of using the coprocessor binaries from stm
How much flash memory is allocated for CPU2 flash and is it possible to write a RF firmware without involvement of CPU2