Hello USB HID gurus !How I can send on IN endpoint 0x81 for HID Custom Descriptor with HAL ?I use USBD_CUSTOM_HID_SendReportand endpoint is 0x81 until #define EP_ADDR_MSK 0xFUI can see my report data on USB Bus Analyzer at OUT EP 0x1 and...
CPU 210MHzIf you run IRQ code from flash you have about 5 times more cpu cycles as needed (7WS)if you switch on ART accelerater and prefetch: for loop gets slower no influence on IRQ latencyyou could not run code from internal SRAM because of missin...
Hi folks, I have tried to run my complete program out of internal SRAM to speed up the IRQsbut if I come to svc 0 it failsprvPortStartFirstTask:
20005ee0: ldr r0, [pc, #32] ; (0x20005f04)
20005ee2: ldr r0, [r0, #0]
20005ee4: ldr r...
I detected that ART accelerator and prefetch is not enabled. Why for loop gets slower if if I switch both on ? /* USER CODE BEGIN SysInit */
#if defined(FLASH_ART_ON)
// enable ART for Flash (x8 Booster)
int FLASH_ACR_REG=0;
volatile unsign...
Hardware & HAL: STM32F767ZI Nucleo 210MHzCube MCU Package 1.15Application USB (12Mbit FS) to UART bridge 115200 baud, 8bit 1s 1s, full duplex test (RX-TX bridged)Tested:The test on /dev/ttyACM0 is running without any errors on all packet 2-64KB sizes...
I can run code from internal SRAM too but I need IRQs and working vectortable, thats the problem !I tyied already with DTCM RAM at 0x20000000 .. see https://community.st.com/s/question/0D50X0000AqqvO3SQI/stm32f767zi-could-not-remapped-to-internal-sr...
The linker script was made by CubeMX code generatorYou are right: Flash Memory on ITCM interface is mapped to 0x00200000-0x003F0000but if I replace the FLASH (rx) : ORIGIN = 0x00200000, LENGTH = 2048K then the load of debugger fails because elf could...
Of course ITCM ( as mentioned in the headline ) cause on AXIM I always have the 7wait states. Maybe the accelerator is enabled by default. If it works 100% that makes no sense to switch it of at reset. And the enable bit is wrong documented and its...
At STM32F4xxx family you can enable data and instruction cache in the FLASH_ACR. You can reset both flash caches in the FLASH_ACR by a bit for each toolooks like they have replaced the singe on/off and reset to ARTEN and ARTRST to do the same. Any ...
The ITCM RAM 16KB is connected to the ITCM bus (I-Cache 8KB)The ACCEL/CACHE is connected to ITCM bus tooThe CUBE MX generated inker file uses SRAM with DTCM RAM as RAM start address/*
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